Printhead Control/Drive Circuit - Epson DFX-8000 Service Manual

2.3.11 Printhead Control/Drive Circuit

Figure 2-27 shows a block diagram of the printhead control/drive circuit.
The number of head coils is 18 (9 X 2 rows). The drive circuit is a constant current coil drive circuit.
Each coil is driven by two transistors (PNP and NPN). The PNP supplies common currents VP 1 and VP2
and the NPN connects and disconnects grounds GP 1 and GP2, and they drive the coil with different
timing. This is to increase the response speed of the head pin by driving the coil T after the PNP transistor
is turned off. (See Figure 2-28.)
Therefore, the number of coil drive signals required is 2 x 18, which is 36. L and R in a signal name
indicates the coil row, left or right, and P and N indicate PNP and NPN transistors, respectively.
Example: HL1 P (Drive signal for the PNP transistor for the first wire on the left row.)
The data from the host computer is expanded into image data (CG data), and latched in the E05A38NA.
Since the data bus is eight bits, the data for the 36 signal lines is latched using a time sharing method.
Allocation of the head data is performed in the E05A38NA (the portion shown by the oblique lines in
the figure below).
The latched data is output while the FIRE signal is active. The FIREO and FIRE 1 signals correspond to
the PNP and NPN side signals, respectively. The timing and drive times of the FIRE signals are controlled
by outputs TOOO and TOO1 from the timer in the CPU.
The drive time is varied in accordance with the gap set by the PG mechanism. (See Table 2-25.)
When the gap is wider than the reference value (thick paper): Drive time becomes longer than the
reference time.
When the gap is narrower than the reference value (thin paper): Drive time becomes shorter than the
reference time.
Each signal is predriven, and input to PNP printhead
STK66025 to turn the internal transistor on or off.
The output signals from the driver are also output to the head driver monitor circuit. As a result, when
the printer power is turned on, test driving of each head coil can be performed as a part of the printer
initialization sequence to check if the circuits are open or shorted.
If a circuit is open or shorted, either the HNERR (when the NPN driver side is defective) or HPERR (when
the PNP driver side is defective) signal becomes active, and the CPU rings the buzzer to warn the user
of an error.
The FTBL port of the E05A38NA inputs the phase switching signal for the printhead cooling fan.
When the signal is received, the E05A38NA outputs the phase switching signal from the HFAN A/B
port to drive the fan motor.
driver STK66 125 or NPN printhead
2-40
driver