Intpn-Interrupt Pin (Function 2); Miscellaneous Control (Function 2); Sbrnum-Serial Bus Release Number (Function 2); Legsup-Legacy Support Register (Function 2) - Intel 460GX Software Developer’s Manual

Universal Serial Bus (USB) Configuration
13.2.13 INTPN–Interrupt Pin (Function 2)
Address Offset:
Default Value:
Attribute:
This register indicates which PCI interrupt pin is used for the USB module interrupt. The USB
interrupt is internally ORed to the interrupt controller with the PIRQD# signal.
Bit
7:3
2:0
13.2.14

Miscellaneous Control (Function 2)

Address Offset:
Default Value:
Attribute:
Bit
15:2
1
0
13.2.15 SBRNUM–Serial Bus Release Number (Function 2)
Address Offset:
Default Value:
Attribute:
This register contains the release of the USB Specification with which this USB Host Controller
module is compliant.
Bit
7:0
13.2.16 LEGSUP–Legacy Support Register (Function 2)
PCI Address Offset:
Default:
Attribute:
This register provides control and status capability for the legacy keyboard and mouse Functions.
13-6
3Dh
04h
Read only
Reserved.
Serial Bus Module Interrupt Routing. The value of 04h in Function 2 indicates that the IFB will
drive PIRQD# as its interrupt line for the USB controller.
6A-6Bh
0000h
Read/Write
Reserved.
Low Speed PreSOF Disable. This bit should be set to '1' to disable.
Reserved.
60h
10h
Read only
Serial Bus Specification Release Number. All other combinations are reserved.
Bits[7:0] Release Number
00h Pre-release 1.0
10h Release 1.0
C0-C1h
2000h
Read/Write Clear
Description
Description
Description
Intel® 460GX Chipset Software Developer's Manual