Mgpioc–Muxed Gpio Control (Function 0); Pdmacfg-Pci Dma Configuration Resister (Function O); Ddmabp-Distributed Dma Slave Base Pointer Registers (Function 0) - Intel 460GX Software Developer’s Manual

Chipset system
Table of Contents

Advertisement

LPC/FWH Interface Configuration
11.1.17
MGPIOC–Muxed GPIO Control (Function 0)
Offset:
Default Value:
Attribute:
Bit
16:13
12
11
10
9
8
7
6
5
4
3:0
11.1.18
PDMACFG–PCI DMA Configuration Resister (Function O)
Address Offset:
Default Value:
Attribute:
Bits
15:14
13:12
11:10
9:8
7:6
5:4
3:2
1:0
11.1.19
DDMABP–Distributed DMA Slave Base Pointer Registers
(Function 0)
Address Offset:
Default Value:
Attribute:
11-8
84-85h
0500h
Read/Write
Reserved.
Reserved. Must be set to '1'.
Reserved.
Reserved. Must be set to '1'.
Reserved.
Reserved. Must be set to '1'.
Reserved. Must be set to '1'.
Reserved. Must be set to '1'.
Reserved. Must be set to '1'.
Reserved. Must be set to '1'.
Reserved.
90-91h
0000h
Read/Write
Reserved. Must be set to '11'.
Reserved. Must be set to '11'.
Reserved. Must be set to '11'.
Reserved.
Reserved. Must be set to '11'.
Reserved. Must be set to '11'.
Reserved. Must be set to '11'.
Reserved. Must be set to '11'.
92-93h (CH0-3), 94-95h (CH5-7)
0000h
Read/Write
Description
Description
Intel® 460GX Chipset Software Developer's Manual

Hide quick links:

Advertisement

Table of Contents
loading

Table of Contents