Arbiter Serr Status; Memory Access Index; Memory Mapped Register Access Port; Ihpc Memory Mapped Registers - Intel 460GX Software Developer’s Manual

WXB Hot-Plug
8.1.21

Arbiter SERR Status

Address Offset:
Default Value:
Bits
7:0
8.1.22

Memory Access Index

Address Offset:
Default Value:
When the "Enable PCI Config Space Access to Hot-Plug Registers" bit in the Miscellaneous Hot-
Plug Configuration Register is set, this register becomes a pointer into the IHPC memory mapped
register space (divided into 64, 32-bit Dwords).
Bits
31:8
7:2
1:0
8.1.23

Memory Mapped Register Access Port

Address Offset:
Default Value:
When the "Enable PCI Config Space Access to Hot-Plug Registers" bit in the Miscellaneous Hot-
Plug Configuration Register is set, this register becomes mapped into the IHPC memory mapped
register space at the location pointed to by the Memory Index Register.
Bits
31:0
8.2

IHPC Memory Mapped Registers

Each IHPC reserves 256 bytes of memory mapped registers. A list of those registers follows.
Unlike other register descriptions in this document, the offset listed is always Dword aligned with
bit offset provided. This nomenclature is used to be consistent with the Memory Access Index
Register in IHPC configuration space. The default power-up value is included in each register
description heading.
8-10
4A
00h
Description
reserved (0)
50h-53h
00000000h
Description
reserved (0)
Hot-Plug Memory Access Index
Read/Write
reserved (0)
54h-57h
00000000h
Description
Memory Mapped Register Access Port
Size:
Attribute:
Size:
Attribute:
Size:
Attribute:
Intel® 460GX Chipset Software Developer's Manual
8 bits
Partial Read/Write
32 bits
Partial Read/Write
32 bits
Read/Write