Interrupt Pin; Hot-Plug Slot Identifier; Miscellaneous Hot-Plug Configuration - Intel 460GX Software Developer’s Manual

WXB Hot-Plug
This is a standard PCI configuration register which defines which interrupt request line on the
interrupt controller this function's interrupt pin (see register 3DH) is connected to. The power-up
default value is FFh.
8.1.15

Interrupt Pin

Address Offset:
Default Value:
This is a standard PCI configuration register which defines which of the four PCI interrupt pins,
INTA# through INTD#, this function is connected to. PCI Hot-Plug is connected to INTA#, making
this value hard-wired to 01h.
8.1.16

Hot-Plug Slot Identifier

Address Offset:
Default Value:
This register indicates which slots support hot-plug. Not used by the IHPC, this register is set by
the boot ROM for later reference by the hot-plug drivers. This register is also mapped to memory
space. System designers are required to follow a convention whereby hot-plug slots are always
implemented in sequential PCI device number order. IHPC slot A should be the lowest numbered
slot (i.e. the device number in this register).
Bits
15:8
7:4
3:0
8.1.17

Miscellaneous Hot-Plug Configuration

Address Offset:
Default Value:
This is a hot-plug specific register used to configure many features of the IHPC.
Bits
15
14
13
12
1. Bit 0 may be changed to a 1 after Reset in future implementation.
8-8
3Dh
01h
40h-41h
0000h
Description
reserved(0)
The PCI device number for the first slot that supports hot-plug.
Number of hot-plug slots controlled.
42h-43h
1
0002h
Description
Change device ID. Write Once/Read Only. Changes the device ID from 123Fh to 123Eh
in order to "hide" the IHPC from industry-standard hot-plug drivers and device
enumerators in non-hot-plug systems.
Inhibit hot-plug registers. Write Once/Read Only. This bit prohibits access to the IHPC
registers, effectively disabling the IHPC.
Enable Power Fault functions. This bit must be set to enable other power-fault related
SERR signaling.
Enable Lock of the Auto Power-Down Disable bit. Write Once/Read Only. This bit
should be written to a logic 1 (by firmware) after the Auto-Power-Down Disable bit of
the Hot-Plug Miscellaneous register has been written. Once written, this bit causes the
Auto-Power-Down Disable bit to be unchangeable until XRST# or PCI reset. This
prevents driver software from changing the auto-power-down feature.
Size:
Attribute:
Size:
Attribute:
Size: 16 bits
Attribute: Read/Write, Write-Once, Read-Only
Intel® 460GX Chipset Software Developer's Manual
8 bits
Read Only
16 bits
Partial Read/Write