Intel 460GX Software Developer’s Manual page 228

LPC/FWH Interface Configuration
Bit
25
24
23
22
21
20
19
18
17
16
11.2.9.1 GP Output
Offset:
Attribute:
Default Value:
Size:
Bit
31:29
28:24
23:20
19:16
15:9
8:0
11.2.9.2 GP Data
Offset:
Attribute:
Default Value:
Size:
Bit
31:29
28:24
23:20
11-38
GPIO
GPIO[19]
GPIO[18]
Reserved
Reserved
Reserved
Reserved
GPIO[13]
GPIO[12]
GPIO[11]
GPIO[10]
00-03h
Read/Write
00000000h
32 bits
Reserved.
Mux Output: When set to a '0', the muxed GPIO pin is programmed as an input. When set to '1',
the muxed GPIO pin is programmed as an output. In the GPO mode, this bit cannot be changed
once the GP Lock bit is set. The setting of this bit only has effect if the muxed GPIO is
programmed to be a GPIO.
Reserved.
Mux Output: When set to a '0', the muxed GPIO pin is programmed as an input. When set to '1',
the muxed GPIO pin is programmed as an output. In the GPO mode, this bit cannot be changed
once the GP Lock bit is set. The setting of this bit only has effect if the muxed GPIO is
programmed to be a GPIO.
Reserved.
Output: When set to a '0', the GPIO pin is programmed as an input. When set to '1', the GPIO pin
is programmed as an output. This bit cannot be changed once the GP Lock bit is set.
04-07h
Read/Write
00000000h
32 bits
Reserved.
Muxed Data: If a data bit is programmed to be an output, then this bit can be updated by software
to drive a value on the output pin. If the data bit is programmed as an input, then this bit reflects
the state of the input pin and cannot be updated by software. This bit cannot be changed once the
GP Lock bit is set. The value of this bit only has meaning if the muxed GPIO is enabled as a GPIO.
Reserved.
Bit GPIO
5 GPIO[5]
4 GPIO[4]
3 GPIO[3]
2 GPIO[2]
1 GPIO[1]
0 GPIO[0]
Description
Description
Intel® 460GX Chipset Software Developer's Manual