Intel 460GX Software Developer’s Manual page 115

Table 6-1. Error Cases (Cont'd)
Chip
Error
Detecting
Request Parity SAC
Error
Unsupported ASZ SAC
Illegal HITM (HITM SAC
on any Expander
bus access)
Address above SAC
TOM
LEN# Protocol SDC
Error
DRDY# Protocol SDC
Error
Write Data Protocol SDC
Error
BERR# Observed SAC
IOQ Overflow/ SAC
Underflow
External XBINIT# SAC
Active
External XSERR# SAC
Active
LOCK# when no SAC
resources are
available
Resource Counter SAC
Overflow/
Underflow
Memory System Protocol Errors
SAC-MAC MAC
Command Parity
Error
'Complete' SAC
Command
Underflow
'Forward' SDC
overlapping
'Forward'
'Forward' SDC
overlapping 'Load'
'Load' overlapping SDC
'Load'
'Load' overlapping SDC
'Forward'
'Forward' SDC
Underflow
Intel® 460GX Chipset Software Developer's Manual
System
Action
Conditional BINIT# FERR_SAC[RQE]
Conditional BINIT# FERR_SAC[ASE]
Unconditional BINIT# FERR_SAC[IHS]
Unconditional BINIT# FERR_SAC[TE]
Unconditional BINIT# SDC_FERR[FS0],
FERR_SAC[SFE]
Unconditional BINIT# SDC_FERR[FS2],
FERR_SAC[SFE]
Unconditional BINIT# SDC_FERR[FS1],
FERR_SAC[SFE]
Convert to BINIT# FERR_SAC
Unconditional BINIT# FERR_SAC[IUE]
Unconditional BINIT# FERR_SAC[XBE]
Conditional BERR# FERR_SAC[XSA]
Unconditional BINIT# FERR_SAC[LTE]
Unconditional BINIT# FERR_SAC[RCE]
ERR# pin asserted on FERR_SAC[MxE],
MAC. FERR_MAC
Unconditional BINIT# by
SAC.
Unconditional BINIT# FERR_SAC[CCxx]
Unconditional BINIT# SDC_FERR[FWMDIx],
FERR_SAC[SFE]
Unconditional BINIT# SDC_FERR[RdWrx],
FERR_SAC[SFE]
Unconditional BINIT# SDC_FERR[LRMDIx],
FERR_SAC[SFE]
Unconditional BINIT# SDC_FERR[WrRdx],
FERR_SAC[SFE]
Unconditional BINIT# SDC_FERR[FRx, FLx],
FERR_SAC[SFE]
Data Integrity and Error Handling
Status
Register Register
SA_FERR
SA_FERR
Nothing
Nothing
Nothing
Nothing
Nothing
Nothing
Nothing
Nothing
Nothing
Nothing
Nothing
CMND_FERR
Nothing
Nothing
Nothing
Nothing
Nothing
Nothing
Log
Qualifier
Flag
System
Bus
Parity
Errors
Flag
System
Bus
Parity
Errors
BERR# to
BINIT#
Enable
BERR#
Driver
Enable
6-17