Intel 460GX Software Developer’s Manual page 35

Chipset system
Table of Contents

Advertisement

26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
Intel® 460GX Chipset Software Developer's Manual
'Forward' Overlapping 'Forward'; Card A (FWMDI1)
Indicates FWMDI sampled asserted while a store transaction is in progress
'Load' Overlapping 'Load'; Card A (LRMDI1)
Indicates LRMDI sampled asserted while a store transaction is in progress
'Load' Overlapping 'Forward'; Card A (WrRd1)
Memory interface 1 detected simultaneous read and write operation. Write and Read
collision.
'Forward' Overlapping 'Load'; Card A (RdWr1)
Memory interface 1 detected simultaneous read and write operation. Read and write
collision.
'Forward' Underflow; Card A Right Stack Error (FR1)
Memory interface 0 received Forward right Bank without corresponding Store command
'Forward' Underflow; Card A Left Stack Error (FL1)
Memory interface received Forward left Bank without corresponding Store command
'Accept Underflow'; Card A (AE1)
Memory interface 0 received data without corresponding Accept command
'Forward' Overlapping 'Forward'; Card B (FWMDI0)
Indicates FWMDI sampled asserted while a store transaction is in progress
'Load' Overlapping 'Load'; Card B (LRMDI0)
Indicates LRMDI sampled asserted while a store transaction is in progress
'Load' Overlapping 'Forward'; Card B (WrRd0)
Memory interface 1 detected simultaneous read and write operation. Write and Read
collision.
'Forward' Overlapping 'Load'; Card B (RdWr0)
Memory interface 1 detected simultaneous read and write operation. Read and write
collision.
'Forward' Underflow; Card B Right Stack Error (FR0)
Memory interface 0 received Forward right Bank without corresponding Store command
'Forward' Underflow; Card B Left Stack Error (FL0)
Memory interface received Forward left Bank without corresponding Store command
'Accept' Underflow; Card B (AE0)
Memory interface 0 received data without corresponding Accept command
Configuration Information Parity Error (CIE)
Data buffer detected data parity while reading config address or data from SDC RAM.
Response Bus Transmission Error (RTE)
Indicates that the SDCRSP bus detected a transmission error.
PDB - ITID Parity Error (IPE)
Look in ITID_FERR Register to isolate.
PDB - Command Parity Error (CPE)
Look in CMD_FERR Register to isolate.
PDB Byte Enable Parity Error (BPE)
Parity error on the Byte-enables from the SAC.
SDC Data Buffer RAM Parity Error (RPE)
SDC detected bad parity on good data stored in its data buffer. Indicates potential RAM
cell disturbance due to alpha or cosmic hit. All four data port map to this bit.
PDB - Data Parity Error (DPE)
Parity Error Detected on transfer of Data from SAC to SDC.
Register Descriptions
2-15

Hide quick links:

Advertisement

Table of Contents
loading

Table of Contents