Intel 460GX Software Developer’s Manual page 57

Chipset system
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1:0
2.5.3.3
PME[1:0]: Performance Monitoring Event Selection
Address Offset:
Default Value:
The PME registers specify the particular event to track in the performance monitoring counters.
The PXB supports tracking of PCI bus transactions (both specific and generic), and PCI bus signal
assertion. Bus transactions may be qualified by the originating agent and transaction destination.
Accumulated event counts are held in the PMD registers, while the PMR registers specify the
action to performed on event detection.
Bits
15
14
13:10
Note: This field is applicable only if the PCI bus is operated in internal-arbiter mode. If the bus is
operated using an external arbiter, this field must be set to Any Agent to trigger any events.
9:8
7:6
Intel® 460GX Chipset Software Developer's Manual
Once configured to count, all counters in the SAC and each PXB can be (nearly)
simultaneously started and stopped using a separate enable.
Reload Mode
Reload has priority over increment. That is, if a Reload event and a count event happen
simultaneously, the count event has no effect.
0
Never Reload
1
Reload when this counter overflows.
2
Reload when the other counter overflows.
3
Reload unless the other counter increments.
E8 - EBh
0000h each
Description
reserved (0)
Count Data Cycles
1: Count data cycles associated with selected event
0: Count the selected event
Initiating Agent Selection
This field qualifies the tracking of bus transactions by limiting event detection to those
transactions issued by specific agents. That is, unless otherwise noted for the specific
event selected (below), the agent initiating the bus transaction must match the selection
specified here for the transaction to be tracked.
0000
Agent 0
0001
Agent 1
0010
Agent 2
0011
Agent 3
0100
Agent 4
0101
Agent 5
0110
reserved
0111
reserved
Transaction Destination Selection
This field qualifies the tracking of bus transactions by limiting event detection to those
transactions directed to a specific resource. That is, unless otherwise noted for the
specific event selected (below), the source or destination of the data must match the
selection specified here for the transaction to be tracked.
00
any
01
Main Memory
reserved
Register Descriptions
Size:
16 bits each
Attribute:
Read/Write
1000
reserved
1001
reserved
1010
reserved
1011
reserved
1100
reserved
1101
South bridge
1110
460GX chipset agent (i.e.
outbound)
1111
Any agent
10
PCI Target
11
Parallel Segment Peer
2-37

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