Ide Controller I/O Space Registers; Bmicx-Bus Master Ide Command Register (I/O); Ultra Dma/33 Timing Mode Settings; Dma/Pio Timing Values Based On Ifb Cable Mode And System Speed - Intel 460GX Software Developer’s Manual

Chipset system
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Table 12-2. Ultra DMA/33 Timing Mode Settings
Cycle Time Bit Settings
Table 12-3. DMA/PIO Timing Values Based on IFB Cable Mode and System Speed
IFB Drive
Mode
PIO0/
Compatible
PIO2/SW2
PIO3/MW1
PIO4/MW2
NOTES:
1.
Table 12-3
2.
Table 12-3
Only (DTE) bit has been enabled for that drive, this resultant cycle time applies to data transfers performed
with DMA only.
12.3

IDE Controller I/O Space Registers

The PCI IDE Function uses 16 bytes of I/O space, allocated via the BMIBA register. All bus master
IDE I/O space registers can be accessed as byte, word, or DWord quantities. The description of the
16 bytes of I/O registers follows.
12.3.1
BMICx–Bus Master IDE Command Register (I/O)
Address Offset:
Default Value:
Attribute:
This register enables/disables bus master capability for the IDE Function and provides direction
control for the IDE DMA transfers. This register also provides bits that software uses to indicate
DMA capability of the IDE device.
Intel® 460GX Chipset Software Developer's Manual
Mode 0 (120 ns)
00
IDETIM [15:8]
IORDY
Recovery
Sample
Time
Point
(RCT)
(ISP)
6 clocks
1 clocks
C0h
(Default)
(Default)
4 clocks
4 clocks
D0h
3 clocks
3 clocks
E1h
3 clocks
1 clock
E3h
assumes that if the attached slave drive is Mode 0 or not present, the SITRE bit is '0'.
assumes that 25 MHz is not supported as a target PCI system speed. If the DMA Timing Enable
Primary Channel–Base + 00h; Secondary Channel–Base + 08h
00h
Read/Write
Ultra DMA/33 Timing Modes
Mode 1 (90 ns)
01
IDETIM [15:8]
Drive 0 (Master)
Drive 0
If no Slave
(Master)
Attached or
If Slave
Slave is
Attached
1
Mode 0
80h
90h
A1h
A3h
IDE Configuration
Mode 2 (60 ns)
10
SIDETIM
Resultant
Pri [3:0]
Cycle Time
Sec [7:4]
Base Operating
Drive 1
Frequency and
(Slave)
Cycle Time
0
30 MHz: 660ns
33 MHz: 600ns
4
30 MHz: 256ns
33 MHz: 240ns
9
30 MHz: 198ns
33 MHz: 180ns
B
30 MHz: 132ns
33 MHz: 120ns
12-9
2

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