Gating The Output - HP E1340A User Manual

Gating the Output

HP IBASIC (GATE)
Comments
C and QuickBASIC
Programs
Appendix C
The following program sets the AFG's gating mode. The internal 42 MHz
oscillator is gated on and off based on the level of a control signal applied to
the 'Aux In' BNC.
1 !RE-SAVE"GATE"
2 GET "SUBS",500,3 !place subprograms at line 500, continue w/line 3
3 !Program which demonstrates how to gate the output signal on and off.
4 !A "low" on the 'Aux In' BNC enables the AFG output. A "high" gates
5 !the output off.
6 !
10 !Compute the E1340 base address in E1300 A16 address space
20 COM Base_addr
30 Base_addr=DVAL("1FC000",16)+(80*64) !base address
40 !
50 !Reset the AFG
60 Afg_reset
70 !Set function and load RAM
80 Function(1,3) !triangle wave in RAM 3
90 !Set the frequency (frequency register 1)
100 Frequency1(5.0E+4) !50 kHz
110 !Set amplitude, offset, impedance, correction
120 Amplitude(2.5,0,50,0) !2.5 Vpk, 0V, 50 ohms, correction enabled
130 !Set the Aux Out level, Aux In level, clock source, Aux Out signal,
140 !RAM bank, frequency register, and output mode.
150 Mode(0,0,1,1,3,0,0) !norm,norm,gate,pulse/cycle,bank 3,reg 1,cont
160 END
170 !
1. Gating is enabled by setting the clock source to 'Gated' and the 'Aux
In' bit (bit 0) to '1' (Table C-2). When the signal applied to the 'Aux
In' BNC is low, the clock (reference oscillator) is allowed to run.
When the signal is high, the clock is halted. The output remains at the
last amplitude point clocked. The waveform resumes with the next
point when the clock is enabled.
The C program GATE.C is in directory "CPROG", and the QuickBASIC
program GATE.BAS is in directory "QBPROG" on the example program
disk HP P/N E1340-10036.
HP E1340A Register-Based Programming 265