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Table C-2. HP E1340A Command Opcodes and Parameter Formats
Setting the function and loading RAM
Bit
7
128
Bit
Weight
DAC Source
Purpose
0 - Input Data
Setting
Register
1 - waveform
EEPROM
Setting Frequency Register 1: Fixed frequency (CW)
Bits
Byte 1 ------->
Byte 2 ------->
Byte 3 ------->
Byte 4 ------->
Setting Frequency Register 2: Fixed frequency (CW)
Bits
Byte 1 ------->
Byte 2 ------->
Byte 3 ------->
Byte 4 ------->
240 HP E1340A Register-Based Programming
6
64
Download Mode
Waveform selection (waveform EEPROM)
0 - waveform
0 0 0 0 - Sine wave
appears at output
0 0 0 1 - Triangle wave
as it is loaded into
0 0 1 0 - Sin (x)/x for 8.25 radians
RAM from the Input
0 0 1 1 - Haversine
Data Register.
0 1 0 0 - Square wave
0 1 0 1 - First 10 terms of a square wave
0 1 1 0 - First 4 terms of a square wave
1 - output remains
0 1 1 1 - Falling ramp
1 0 0 0 - First 20 terms of a falling ramp
at 0V as waveform
is loaded into RAM
1 0 0 1 - Rising ramp
from the Input Data
1 0 1 0 - First 20 terms of a rising ramp
Register.
1 0 1 1 - White noise
1 1 0 0 - Modulated white noise
1 1 0 1 - A 3rd, 4th, 5th harmonic chord
1 1 1 0 - 8 cycles of linear rising sine wave
1 1 1 1 - Positive half-cycle sine wave
Sweep start frequency
1st FSK frequency
7
6
Most Significant Byte of Frequency
Least Significant Byte of Frequency
Sweep stop frequency
2nd FSK frequency
7
6
Most Significant Byte of Frequency
Least Significant Byte of Frequency
5
4
3
32
16
8
Command Opcode = 1
5
4
3
2nd Significant Byte of Frequency
3rd Significant Byte of Frequency
Command Opcode = 2
5
4
3
2nd Significant Byte of Frequency
3rd Significant Byte of Frequency
Command Opcode = 5
2
1
4
2
RAM
0 0 - RAM 0
0 1 - RAM 1
1 0 - RAM 2
1 1 - RAM 3
2
1
0
2
1
0
Appendix C
0
1
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