Table of Contents
Advertisement
A
PSMI Generation
J8J1
R8J16
4
SMA_CONN
1
5
3
J8J3
2
4
NO_STUFF_SMA CON
No Stuff
R8H6
NO_STUFF_0
No Stuff
For EV experimental
work only
J8H2
1
51
EV_SMB_CLK
2
51
EV_SMB_DATA
3
4
5
3
6
EVMC_I2C_connector
R8H7
No Stuff
For EV experimental
work only
Therm4 Connector and Fan Circuit
A_TEMP1N_P
A_TEMP1N_N
2
A_FAN_P1_VCC
J1H3
1
2
3
4
A_HEAT1
5
6
7
8
9
10
J1H4
2X5-Header
A_FAN_P1
A_FAN_P0_VCC
J1J1
1
2
3
4
A_HEAT0
5
6
1
7
8
9
10
J1H5
2X5-Header
A
B
3..5,9,18..20,40,42,43
+VCCP
R8J14
10K
PSMI#
18
3
1K
SMA_CONN_D
Q8J5
1
2N3904
R8J15
2
10K
SMB_CLK 18,21..24
8,10
Layout Note:
Place NO_STUFF near
8,10
divider circuit
For J9F6, J9F7, J9F5, J9F2,
NO_STUFF_0
J9F1
SMB_DATA 18,21..24
Jumper 1-2 for EV support
+V5S
8,15..18,20,23..25,27,34,35,38..41,43,45
J1H2
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
THRM_SMB_DATA
17
18
R1H5
19
20
THRM_SMB_CLK
21
22
R1H4
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
20X2 Header
A_TEMP0N_N
A_TEMP0N_P
A_FAN_P0
B
C
9
+V2.5_GMCH_TXLVDS
Layout Note:
Resistors: R3G4,R6T6,R6P4,R4D1,R6R1,
R5T3,R5R11,R5P8,R4G2,R3G8,R4E3,R6W11,
R3G1,R1C2 should be placed by the risistor
divider networks not near the EVMC slot.
+V1.35S_GMCH 9,43
SM_VREF_MCH_EV_D
R3G4
44
SM_VREF_MCH_EV
NO_STUFF_0
MCH_HLVREF_D
R6T6
8,10
MCH_HLVREF
NO_STUFF_0
R6P4
NO_STUFF_0
43
1.35V_EV
R4D1
NO_STUFF_0
3
H_GTLREF
R6R1
NO_STUFF_0
7,15
DVO_VREF
R5T3
NO_STUFF_0
MCH_HDVREF
R5R11
NO_STUFF_0
MCH_HXSWING
11,12,44,51
3..5,9,18..20,40,42,43
+VCCP
1
14,44,51
+V1.25S
3
CON3_HDR
MCH_HLVREF_D
1
DVO_VREF_D
3
CON3_HDR
VOUT_EVMC_B39
43
NO_STUFF_0
1.25V_DDR_EV
44
1.25V_DDR_EV_D
R4G2
NO_STUFF_267_1%
R3G8
SM_VREF_DIMM_EV_D
NO_STUFF_0
SM_VREF_DIMM_EV 44
EV_SMB_DATA
0
EV_SMB_CLK
0
8,10
R4E3
MCH_HYSWING
MCH_HYSWING_D
NO_STUFF_0
Label on Silk Screen
Do Not Use This Slot
For PCI Operations
C
D
F8H1
1.1A
2
1
+2.5V_EVMC_IN
+
+2.5V_EVMC_SENSE
R8H3
0
GND_DDR
+2.5V_EVMC_GND_SENSE
R8J12
0
B1
A1
-12V
TRST#
B2
A2
TCK
+12V
B3
A3
GND1
TMS
B4
A4
TDO
TDI
B5
A5
+5V (1)
+5V (7)
B6
A6
+5V (2)
INTA#
B7
A7
INTB#
INTC#
1.35V_EV_D
B8
A8
INTD#
+5V (8)
H_GTLREF_D
B9
A9
PRSNT1#
RSV3
DVO_VREF_D
B10
A10
RSV1
+5V (9)
MCH_HDVREF_D
B11
A11
PRSNT2#
RSV4
B12
A12
GND2
GND14
B13
A13
GND3
GND15
MCH_HXSWING_D
B14
A14
RSV2
RSV5
B15
A15
GND4
RST#
+V2.5_DDR
B16
A16
CLK
+5V (10)
B17
A17
GND5
GNT#
B18
A18
REQ#
GND16
2
B19
A19
+5V (3)
PME#
B20
A20
AD31
AD30
J9E6
B21
A21
AD29
+3.3V (7)
B22
A22
GND6
AD28
B23
A23
AD27
AD26
B24
A24
AD25
GND17
EVMC_AD25
2
B25
A25
+3.3V (1)
AD24
B26
A26
C/BE3#
IDSEL
J9F6
B27
A27
AD23
+3.3V (8)
B28
A28
GND8
AD22
B29
A29
AD21
AD20
B30
A30
AD19
GND18
B31
A31
+3.3V (2)
AD18
B32
A32
AD17
AD16
B33
A33
C/BE2#
+3.3V (9)
B34
A34
GND9
FRAME#
R5P8
B35
A35
IRDY#
GND19
B36
A36
+3.3V (3)
TRDY#
B37
A37
DEVSEL#
GND20
B38
A38
GND10
STOP#
B39
A39
LOCK#
+3.3V (10)
B40
A40
PERR#
SDONE
B41
A41
+3.3V (4)
SBO#
B42
A42
SERR#
GND21
B43
A43
+3.3V (5)
PAR
B44
A44
C/BE1#
AD15
B45
A45
AD14
+3.3V (11)
B46
A46
GND11
AD13
B47
A47
AD12
AD11
B48
A48
AD10
GND22
B49
A49
GND12
AD09
KEY
B52
A52
AD08
C/BE0#
B53
A53
AD07
+3.3V (12)
B54
A54
+3.3V (6)
AD06
B55
A55
AD05
AD04
B56
A56
AD03
GND23
B57
A57
GND13
AD02
B58
A58
AD01
AD00
B59
A59
+5V (4)
+5V (11)
B60
A60
ACK64#
REQ64#
B61
A61
+5V (5)
+5V (12)
B62
A62
+5V (6)
+5V (13)
J9G1
CON120_PCI
EVMC SLOT
Title
EVMC SLOT
Size
Project:
A
Intel Celeron M / 852GM CRB C26116
Date:
Wednesday, January 12, 2005
D
E
J8H1
1
2
3
EVMC Schmoo Header
4
5
6
6Pin_HDR
IMVP-4Strap_VID1 39
IMVP-4Strap_VID2 39
IMVP-4Strap_VID3 39
HUB_VREF_ICH_D
R6W11
HUB_VREF_ICH
NO_STUFF_0
IMVP-4Strap_VID4 39
IMVP-4Strap_VID5 39
2.5V_DDR_EV_D
R3G1
2.5V_DDR_EV 44
NO_STUFF_0
J9F7
SM_VREF_MCH_EV_D
1
EVMC_A21
+VCC_CORE
2
R9F4
4,40..42,51
3
NO_STUFF_0
CON3_HDR
J9F5
H_GTLREF_D
1
2
HUB_VREF_ICH_D
3
CON3_HDR
EVMC_A33
J9F2
MCH_HDVREF_D
1
2
MCH_HYSWING_D
3
EVMC_A37
CON3_HDR
J9F1
SM_VREF_DIMM_EV_D
1
EVMC_A39
+V1.5S
2
4,9,15,19,20,45,51
3
CON3_HDR
1.5V_EV_D
R1C2
1.5V_EV
45
NO_STUFF_0
J9J2 Jumper for EV support
J9J2
EVMC_REQ64#
1
2
3,5,45
ITP_DBRESET#
Document Number
Rev
4.403
Sheet
46
of
51
E
4
18
3
2
1
Advertisement
Table of Contents
