Intel 852GM Design Manual page 291

Chipset platform
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A
+V1.5ALWAYS
15
+V1.5
R7G4
4
0.01_1%
C8G1
22UF
+V3.3
15,18,19,23,27,30,32,35,37..39,43,44
18
R7G5
0.01_1%
C7G7
C7W3
C7V3
C7G6
22UF
0.1UF
0.1UF
4.7UF
9,15,19,44,47,48
3..5,9,10,18,40,41,47,48
3
9,15,19,44,47,48
+V1.5S
0
R7V5
VCCPLL
C7V2
C7V1
0.1UF
0.01UF
,23..25,27,34,35,38..40,42,44,47
+V5S
19,21,22,24,37
+V3.3S_ICH
1
R8G5
CR8G1
1K
BAT54
3
2
C7W1
C7W19
1UF
0.1UF
1
A
B
+V1.5A_ICH
R8J7
0.01_1%
C6G1
C7W6
C7W15
C7W18
10UF
0.1UF
0.1UF
NO_STUFF_0.1UF
No Stuff
+V1.5_ICHLAN
C7W7
C7W8
0.1UF
0.1UF
+V3.3_ICHLAN
VCC5REF
+V5A_ICH
+V1.5S
18
+V1.5S_ICHHUB
R6G5
0.01_1%
C6H1
C7W14
C7W12
22UF
0.1UF
0.1UF
+VCC_IMVP
R6H6
NO_STUFF_0.01_1%
C7W16
C7W22
1UF
0.1UF
For power measurement, cut the
+VCC_IMVP plane and populate
R6H6.
5,15,19,21..23,27..29,32,36..39,44,48
+V3.3ALWAYS
1
21,28,29
+V5_ALWAYS
3
VCC5REF
R7V3
C7G2
1K
1UF
B
C
U7G2C
19,21,22,24,37
E12
A5
VCCSUS1.5_0
VCC3.3_0
E13
B2
VCCSUS1.5_1
VCC3.3_1
E20
H6
VCCSUS1.5_2
VCC3.3_2
F14
H18
VCCSUS1.5_3
VCC3.3_3
G18
J1
VCCSUS1.5_4
VCC3.3_4
R6
J18
VCCSUS1.5_5
VCC3.3_5
T6
K6
VCCSUS1.5_6
VCC3.3_6
U6
M10
VCCSUS1.5_7
VCC3.3_7
P6
VCC3.3_8
F6
P12
VCCLAN1.5_0
VCC3.3_9
F7
U1
VCCLAN1.5_1
VCC3.3_10
V10
VCC3.3_11
E9
V16
VCCLAN3.3_0
VCC3.3_12
F9
V18
VCCLAN3.3_1
VCC3.3_13
AC8
VCC3.3_14
AC17
VCC3.3_15
E7
ICH4-M
VCC5REF1
V6
K10
VCC5REF2
VCC1.5_0
POWER
K12
VCC1.5_1
K18
VCC1.5_2
E15
K22
VCC5REFSUS1
VCC1.5_3
P10
VCC1.5_4
T18
VCC1.5_5
L23
U19
VCCHI_0
VCC1.5_6
M14
V14
VCCHI_1
VCC1.5_7
P18
VCCHI_2
T22
VCCHI_3
AB5
VCCRTC
C22
E11
VCCPLL
VCCSUS3.3_0
F10
VCCSUS3.3_1
21,37
F15
VCCSUS3.3_2
P14
F16
VCC_CPU_IO_0
VCCSUS3.3_3
U18
F18
VCC_CPU_IO_1
VCCSUS3.3_4
AA23
K14
VCC_CPU_IO_2
VCCSUS3.3_5
V7
VCCSUS3.3_6
V8
VCCSUS3.3_7
V9
VCCSUS3.3_8
F17
VCCSUS3.3_9
ICH4-M
5,15,19,21..23,27..29,32,36..39,44,48
+V3.3ALWAYS
CR7G2
BAT54
+V5A_ICH
C8J1
C7G3
10UF
0.1UF
5,15,19,21..23,27..29,32,36..39,44,48
U7G2D
ICH4-M
R8J8
1K
39
V1.5_PWRGD
3
CR8J1A
3904
4
C
D
+V3.3S_ICH
C7J3
C7J2
C7W2
C7W5
C7W10
C7W13
C7W17
22UF
22UF
0.1UF
0.1UF
0.1UF
0.1UF
0.1UF
Note: Some of the
decoupling Caps may be
extra and shall be removed
after the first build.
+V1.5S_ICH
R7V4
1
+ C7G5
C7G8
C7W11
C7W20
0.01_1%
100uF
22UF
0.1UF
0.1UF
2
19,21
+V_RTC
C7J1
0.1UF
5,15,19,21..23,27..29,32,36..39,44,48
+V3.3ALWAYS_ICH
R7G1
C7G4
C7V4
C7W21
C7W4
0.01_1%
22UF
0.1UF
0.1UF
0.1UF
15
+V1.5
R8J2
+V1.5ALWAYS
10K
U8H2
1
5
IN
OUT
2
GND
POK
4
POK
3
SHDN#
MAX8888
C8H1
R8J4
+V3.3ALWAYS
10UF
20k_1%
R8J10
1K
POK_DQ
6
R8J5
POK_D
CR8J1B
5
2
3904
470
1
Title
ICH4-M (3 of 3)
Size
Project:
A
Intel 852GM CRB
D
E
+V3.3S
5,6,8,9,11,15,16,18,21,23
R6H2
C7W9
0.01_1%
0.1UF
4
+V1.5S
9,15,19,44,47,48
3
+V3.3ALWAYS
15
+V1.5
+V5
21..23,27,
U8H3
SI3442DY
6
5
4
2
1
R8J9
R8J11
C8J2
10K
10K
10UF
2
0.1UF
C8J3
Q8J3
BSS138
1
Q8J2
BSS138
1
1
PM_SLP_S4# 19,32,37,38,43,44
Document Number
Rev
A#
20
of
59
E

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