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A
7
DVOBHSYNC
7
DVOBVSYNC
7
DVOBD[11:0]
DVOBD1
DVOBD0
DVOBD3
DVOBD2
4
DVOBD5
DVOBD4
DVOBD6
DVOBD9
DVOBD8
DVOBD11
DVOBD10
7
DVOBCCLKINT
7
DVOBFLDSTL
7
MDDCDATA
7
DVOCVSYNC
7
DVOCHSYNC
7
DVOCBLANK#
DVOCD0
DVOCD1
DVOCD2
DVOCD3
DVOCD4
DVOCD7
DVOCD6
DVOCD9
DVOCD8
DVOCD11
DVOCD10
3
7
DVOCD[11:0]
7
DVOBCINTRB
+V1.5S_DVO
7
DVOCFLDSTL
7
DVOCCLK#
7
DVOCCLK
7
DVOBCLK#
7
DVOBCLK
R7E4
R7E2
ADD_RSVD_A18
ADD_RSVD_B18
6
CLK_DVO_SLOT
8.2K
8.2K
ADD_PERR#
ADD_SERR#
7
MI2CDATA
ADD_RSVD_B8
7
MDVIDATA
ADD_RSVD_A8
2
7
MI2CCLK
7,8,10,18,33
PCI_RST#
7
MDVICLK
ADD_RSVD_B12
ADD_RSVD_A14
8
AGP_TYPEDET#
7
MDDCCLK
18,21,23,24
INT_PIRQB#
18,21,23,24
INT_PIRQA#
7,8
ADDDETECT
7,8
AGP_ST0
7,8
AGP_ST1
7,8
AGP_ST2
1
7
DPMS_CLK
18,22,23,37
PCI_PME#
A
B
5,19..23,27..29,32,36..39,45,51
+V3.3ALWAYS
J6C1
ADD 124
+V5S_DVO
A65
B24
AD0
3.3Vaux
B65
B3
AD1
5.0V2
A63
B2
AD2
5.0V1
B63
A1
AD3
12V
A62
AD4
B62
B9
AD5
VCC3.3_1
A60
B16
AD6
VCC3.3_2
B60
B25
AD7
VCC3.3_3
B57
B28
AD8
VCC3.3_4
A56
A9
AD9
VCC3.3_5
B56
A16
AD10
VCC3.3_6
+V3.3S_DVO
A54
A25
AD11
VCC3.3_7
B54
A28
AD12
VCC3.3_8
A53
AD13
B53
B52
AD14
VDDQ1
+V1.5S_DVO
A51
A52
AD15
VDDQ2
A39
AD16
B38
B34
AD17
VDDQ1.5_1
A38
B40
AD18
VDDQ1.5_2
B36
B47
AD19
VDDQ1.5_3
A36
B58
AD20
VDDQ1.5_4
B35
B64
AD21
VDDQ1.5_5
A35
A34
AD22
VDDQ1.5_6
B33
A40
AD23
VDDQ1.5_7
A30
A58
AD24
VDDQ1.5_8
B30
A64
AD25
VDDQ1.5_9
A29
AD26
B29
B66
AD27
Vrefcg
A27
A66
AD28
Vrefgc
B27
AD29
ADDID0
A26
B15
AD30
SBA0
ADDID1
B26
A15
AD31
SBA1
ADDID2
B17
SBA2
ADDID3
A32
A17
AD_STB1#
SBA3
ADDID4
B32
B20
AD_STB1
SBA4
ADDID5
A59
A20
AD_STB0#
SBA5
ADDID6
B59
B21
AD_STB0
SBA6
ADDID7
A18
A21
SB_STB#
SBA7
B18
SB_STB
A57
C/BE0#
B7
B51
CLK
C/BE1#
B39
C/BE2#
B48
A33
PERR#
C/BE3#
B50
SERR#
B46
DEVSEL#
B8
REQ#
A41
FRAME#
A8
GNT#
B41
IRDY#
A7
RST#
A46
TRDY#
B14
RSVD1
B12
B22
RBF#
RSVD2
A14
A3
WBF#
RSVD3
A11
RSVD4
A2
A22
TYPEDET#
RSVD5
A24
RSVD6
A47
STOP#
B5
GND1
B6
B13
INTB#
GND2
A6
B19
INTA#
GND3
B23
GND4
B1
B31
OVRCNT#
GND5
B37
GND6
A50
B49
PAR
GND7
B55
GND8
B10
B61
ST0
GND9
A10
A5
ST1
GND10
B11
A13
ST2
GND11
A19
GND12
A12
A23
PIPE#
GND13
A31
GND14
A48
A37
PME#
GND15
A49
GND16
A4
A55
USB-
GND17
B4
A61
USB+
GND18
B
C
MDDCDATA
+V12S 17,23,27,37,45
MI2CDATA
C6C7
MDVIDATA
0.1UF
MI2CCLK
51
18..20,23,27,30,32,35,37,38,44,45
MDVICLK
+V3.3
R6P5
MDDCCLK
NO_STUFF_.01
1%
+V1.5
20
4,9,19,20,45,46,51
R7T1
NO_STUFF_.01
1%
Note: D3 hot support
ADDID[7:0]
7
C7T1
Place C7T1 near
ADD slot
0.1UF
ADDID7 should be pulled down to GND w/ 1K when using on-board DVO devices
DVOBD7
7
DVOBBLANK# 7
ADD_RSVD_B39
DVOCD5
7
+V1.5S_DVO
C6E3
C7E8
+
C6D5
C7D5
22UF
NO_STUFF_150uF
100uF
NO_STUFF_150uF
8,16..18,20,23..25,27,34,35,38..41,43,45,46
+V5S_DVO
C7C4
22UF
51
+V3.3S_DVO
C7D3
C6C10
C7C8
+
100uF
22UF
22UF
C
D
+V1.5S_DVO
R6E4 2.2k
Q6D2
R7E1 2.2k
BSS138
R6D4 2.2k
3
2
PM_SUS_CLK
19,37
R7D1 2.2k
+V12S 17,23,27,37,45
R6E2 2.2k
R6D7
100K
R6E1 2.2k
8
AGP_TYPEDET#
+V1.5S
R6D3
1K_1%
DVO_VREF 7,46
R6D5
1K_1%
C7E5
C7E6
C6E6
C7D4
C6D4
C6E8
0.1UF
0.1UF
0.1UF
0.1UF
0.1UF
0.1UF
+V5S
R7C4
0.01_1%
C7C6
C7C7
0.1UF
0.1UF
+V3.3S
3,5,6,8,9,11,16..18,20,21,23,26,31,33..36,38..40,43,45,51
R6P6
C6C9
C6D2
C6D1
0.002
1%
0.1UF
0.1UF
0.1UF
Title
AGP Digital Display (ADD) Connector
Size
Project:
A
Intel Celeron M / 852GM CRB C26116
Date:
Wednesday, January 12, 2005
D
E
Q6D1
BSS138
2
3
AGP_PIPE#_FET
DPMS_CLK 7
DPMS_CLK
+V1.5S
4,9,19,20,45,46,51
R6T1
C6E12
0.01_1%
0.1UF
Document Number
Rev
4.403
Sheet
15
of
51
E
4
3
2
1
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