Intel 852GM Design Manual page 301

Chipset platform
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A
4
18
LAN_JCLK
3
+V3.3_LAN
If LAN is enabled,
R6A6
10K
PM_LANPWROK waits for
PM_PWROK to go high and
LAN_TCK
stays high in S3.
Q6A1
BSS138
1
18,32
PM_LANPWROK
82562EM Testpoint Header
2
1
A
B
+V3.3
15,18..20,23,27,32,35,37..39,43,44
+V3.3_LAN
R6A1
0.01_1%
Bulk caps should be 4.7uF or higher.
L6A1
1
C6A5
C6A7
C6A10
C6A11
C6A3
C6A2
4.7UH
4.7UF
4.7UF
0.1UF
0.1UF
0.1UF
0.1UF
39
JCLK
42
18
LAN_RST
JRSTSYNC
45
18
LAN_TXD2
JTXD2
44
18
LAN_TXD1
JTXD1
43
18
LAN_TXD0
JTXD0
Platform LAN
37
JRXD2
18
LAN_RXD2
35
JRXD1
Connect
18
LAN_RXD1
34
JRXD0
18
LAN_RXD0
LAN_ADV
41
ADV10
30
ISOL_TCK
28
ISOL_TI
29
ISOL_EX
LAN_TOUT
26
TOUT
LAN_TESTEN
21
TESTEN
R6M1
100
82562EM
J6A1
1
2
NO_STUFF
B
C
Layout note:
Place 100 Ohm resistor
+V3.3_L_LAN
2
close to 82562EM
C6A6
C6A4
Optional cap: C1 value
0.1UF
4.7UF
6pF - 12pF if needed for
magnetics
No Stuff
U6A1
R6A5
C6A1
10
TDP
100_1%
NO_STUFF_10PF
11
TDN
LAN_RDP
15
RDP
16
RDN
LAN_RDN
LAN_RB100
R6A2
619_1%
5
RBIAS100
LAN_RB10
R6A3 549_1%
4
RBIAS10
LAN_ACTLED#
32
ACTLED
LAN_SPDLED#
31
SPDLED
LAN_LILED#
27
LILED
LAN_X2
47
X2
LAN_X1
46
X1
Y5A1
1
4
25MHZ
C6A9
C6A8
22PF
22PF
Title
Size
A
C
D
Layout note:
Transmit/Receive pairs
need to be 50 ohms
+V3.3_LAN
J5A1A
LAN_TDP
9
TDP
LAN_TDN
10
TDN
TDC
13
TDC1
12
TDC2
R6A4
121_1%
11
RDP
14
RDN
17
LED_PWR
18
SPEED LED
19
ACT_LED
20
LINK_LED
STACKED_RJ45_USB
Magnetics and LED resistors
are integrated into RJ-45
Chassis GND
(should cover part
of magnetics)
LAN Interface (82562EM)
Project:
Document Number
Intel 852GM CRB
A#
D
E
4
15
RXC
28
GND1
27
GND2
26
GND3
25
GND4
24
GND5
3
23
GND6
22
GND7
GRN
21
GND8
16
GND9
YLW
2
1
Rev
30
of
59
E

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