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A
5,15,19..23,27..29,32,36..38,44,48
+V3.3ALWAYS
C7A2
0.1UF
U7A3
1
44
PWR_PWROK
2
74AHC1G08
20
V1.5_PWRGD
5,15,19..23,27..29,32,36..38,44,48
+V3.3ALWAYS
4
C7B2
0.1UF
1
43
DDR_VR_PWRGD
2
74AHC1G08
21
V5A_PWRGD
5,15,19..23,27..29,32,36..38,44,48
C4B2
0.1UF
40
ON_BOARD_VR_PWRGD
INTERPOSER_PRES#
3
5,15,19..23,27..29,32,36..38,44,48
14
U4B3C
10
74HC00
INTERPOSER_PRES
8
13
9
12
7
R4N1
OFF_BOARD_VR_PWRGD
100K
5,6,8,9,11,15,16,18,20,21,23,26,31,33..36,38,40,42,44,48
+V3.3S
Layout note:
R2Y3
R2Y2
R2Y1
330
330
330
Route +VCC_VID
2
to processor with at
least a 25 mil trace.
VID5_LED
VID4_LED
VID3_LED
DS2J5
DS2J3
DS2J4
GREEN
GREEN
GREEN
J5C2
VR_VID5
1
VR_VID4
3
VR_VID3
5
7
4,40
+VCC_VID
9
11
13
23,26,31,33..36,38,40,42,44,48
+V3.3S
15
17
19
8,20,23..25,27,34,35,38,40,42,44,47
+V5S
21
23
25
27
29
31
1
33
35
37
39
16,21,40,44
+VDC
20x2_Header
Connector 2
(rows C,D)
A
B
Step 1 - Power OK
C7A4
0.1UF
U7A6
MAIN_PWROK
4
1
4
PM_PWROK 19,21,25,32,37
MAIN2_PWROK
74AHC1G08
2
U7B1
4
+V3.3ALWAYS
VR PWRGD CIRCUIT
14
U4B3A
14
U4B3B
1
PWRGD1
74HC00
3
4
2
74HC00
6
5
7
7
+V3.3ALWAYS
14
U4B3D
PWRGD2
74HC00
11
5,6,8,9,11,15,16,18,20,21,23,26,31,33..36,38,40,42,44,48
7
3
R1Y3
R1Y2
R1Y1
330
330
330
VID2_LED
VID1_LED
VID0_LED
DS1J1
DS1J2
DS1J3
GREEN
GREEN
GREEN
VR_VID2
2
VR_VID1
4
VR_VID0
6
8
+V3.3S
5,6,8,9,11,15,16,18,20,21,23,26,31,33..36,38,40,42,44,48
10
12
14
16
18
6,8,11,12,16,18
SMB_DATA_S
20
+V5S
8,15..18,20,23..25,27,34,35,38,40,42,44,47
22
24
26
28
30
32
34
36
38
40
VR Interposer Headers
B
C
Step 2 - VR ON
32,37,42
VR_ON
32
VR_SHUT_DOWN#
Step 3 - Power Good
15,18..20,23,27,30,32,35,37,38,43,44
+V3.3
U7A5
1
42
GMCH_VCORE_PWRGD
4
74AHC1G08
2
5,6,8,9,11,15,16,18,20,21,23,26,31,33..36,38,40,42,44,48
VR_PWRGD 37
4
H_VID[4:0]
+V3.3S
H_VID5
R1H6
J1H1
1K
J1H7
4
CON3_HDR
VR_VID5
CON3_HDR
CON3_HDR
CON3_HDR
CON3_HDR
CON3_HDR
47
STRAP_VID4
VID5 Setting
J1H7
47
STRAP_VID3
Processor Control
1-2 (Default)
47
STRAP_VID2
47
STRAP_VID1
Logic "0"
2-3
47
STRAP_VID0
Logic "1"
1-X
8,15..18,20,23..25,27,34,35,38,40,42,44,47
5,6,8,9,11,15,16,18,20,21,23,26,31,33..36,38,40,42,44,48
+V3.3S
J5C3
3
H_PROCHOT#
1
2
TP_OFF_BOARD_VCC_VID_PWRGD
3
4
OFF_BOARD_VR_PWRGD
5
6
SMB_CLK_VR
7
8
3
H_VIDPWRGD
9
10
11
12
INTERPOSER_PRES#
13
14
15
16
R5B3
SMB_DATA_VR
17
18
19
20
NO_STUFF_0
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
16,21,40,44
+VDC
20x2_Header
Connector 1
(rows A,B)
C
D
5,6,8,9,11,15,16,18,20,21,23,26,31,33..36,38,40,42,44,48
C4B5
0.1UF
INTERPOSER_PRES#
U4B4
1
4
74AHC1G08
2
OFF_BOARD_VR_ON
+V3.3S
R3G10
10K
C7B1
VR_PWRGD_CK408# 6
0.1UF
3
R2G9
IMVP_PWRGD_D
Q2G1
1
2N3904
10K
2
IMVP_PWRGD 7,40
+V3.3S
R1F1
1K
1K
H_VID0
H_VID1
H_VID2
J1G1
H_VID3
J1G2
H_VID4
J1G3
STRAP_VID0
0
J1G4
STRAP_VID1
1
STRAP_VID2
2
STRAP_VID3
3
STRAP_VID4
BE#
2
1
BX
J1F1
R1F6
R1E3
8.2K
1K
JUMPER SETTINGS
+V5S
DIP Switch Settings
4
3
2
1
PM_STPCPU# 6,19,37,40
PM_DPRSLPVR 19,37,40
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
1
OFF_BOARD_VR_ON
0
0
1
0
0
0
1
0
0
0
1
1
0
0
1
1
R5B4
0
1
0
0
NO_STUFF_0
0
1
0
0
0
1
0
1
0
1
0
1
SMB_CLK_S 6,8,11,12,16,18
0
1
1
0
0
1
1
0
0
1
1
1
0
1
1
1
Title
Processor VR Interposer Support & Power Circuitry
Size
Project:
A
Intel 852GM CRB
D
E
+V3.3S
R4N2
C4B4
2.2k
0.1UF
U4B5
1
4
ON_BOARD_VR_ON 40
2
74AHC1G08
5,6,8,9,11,15,16,18,20,21,23,26,31,33..36,38,40,42,44,48
Note: J1F1 enables
Manual VID strapping
R1F3
With pin 13 high, B input goes to C
1K
output. With pin 13 low, A input goes
to C output.
U1F1
3
2
VR_VID0 34,40
A0
C0
7
6
VR_VID1 34,40
A1
C1
11
10
A2
C2
VR_VID2 34,40
17
16
VR_VID3 34,40
A3
C3
21
20
VR_VID4 34,40
A4
C4
4
5
B0
D0
8
9
B1
D1
14
15
B2
D2
+V5S
8,15..18,20,23..25,27,3
18
19
B3
D3
22
23
B4
D4
1
24
BE#
VCC
13
12
BX
GND
C1F2
0.01UF
Bus_Switch_74CBT3383
For EVMC use, J1F1 is to be jumpered and J1G1,
J1G2, J1G3, J1G4, J1H1 need to be jumpered 1-2
Mobile Northwood VID table
DIP Switch Settings
+VCC_CORE
+VCC_CORE
0
4
3
2
1
0
0
1.750 V
1
0
0
0
0
0.975 V
1
1.700 V
1
0
0
0
1
0.950 V
0
1.650 V
1
0
0
1
0
0.925 V
1
1.600 V
1
0
0
1
1
0.900 V
0
1.550 V
1
0
1
0
0
0.875 V
1
1.500 V
1
0
1
0
1
0.850 V
0
1.450 V
1
0
1
1
0
0.825 V
1
1.400 V
1
0
1
1
1
0.800 V
0
1.350 V
1
1
0
0
0
0.775 V
1
1.300 V
1
1
0
0
1
0.750 V
0
1.250 V
1
1
0
1
0
0.725 V
1
1.200 V
1
1
0
1
1
0.700 V
0
1.150 V
1
1
1
0
0
0.675 V
1
1.100 V
1
1
1
0
1
0.650 V
0
1.050 V
1
1
1
1
0
0.625 V
1
1.000 V
1
1
1
1
1
0.600 V
Document Number
Rev
A#
39
of
59
E
4
3
2
1
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