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5
5..18,20,23..25,27,34,35,38..41,45,46
D
+V5S
R6C3
.002
5%
C5C4
0.15UF
NO_STUFF_102276-100
C
TP5C1
3..5,9,18..20,40,42,46
+VCCP
L5C2
1
2
4.7uH
R5P5
1.69K
1%
46
VOUT_EVMC_B39
Layout:
R5P9
66.5
R4G2 needs to be
1%
placed w/in 1" of
divider circuit
C5C3
0.01UF
B
R5P6
10K_1%
Intel 852GM GMCH VR Controller
A
5
4
VDC_VTTVR
C5C6
10UF
+V5S_VTTMCH
CR5C1
BAT54WT1
R5C2
0
6225_BST1
6225_LG1
3
4
6225_PH1
Q5C1B
SI4966DY
5
6
32,37
R5C3
1
NO_STUFF_0
2
6225_SNUB1
Q5C1A
C5P1
SI4966DY
7
8
NO_STUFF_1000PF
R5P4
100K_1%
Layout:
C5C1 needs 20 mil trace no
more than 1/2" from pin14
R5N11 0
4
3
+VDC 16,21,39,41,45
R5C1
.002
5%
R6C5
U5C2
1
28
GND
VCC
2
27
LGATE1
LGATE2
3
26
PGND1
PGND2
4
25
PHASE1
PHASE2
6225_UG1
5
24
UGATE1
UGATE2
6225_BOOT1
6
23
BOOT1
BOOT2
R5P11
7
22
ISEN1
ISEN2
2K_1%
8
21
VR_ON
EN1
EN2
6225_VOUT1
9
20
VOUT1
VOUT2
6225_VSEN1
10
19
VSEN1
VSEN2
6225_OC1
11
18
OCSET1
OCSET2
6225_SS1
12
17
SOFT1
SOFT2
13
16
DDR
PG2/REF
14
15
VIN
PG1
ISL6225
C5C2
Vccp_PWRGD
0.01UF
Vcc-mch_PWRGD
+V3.3S
3,5,6,8,9,11,15..18,20,21,23,26,31,33..36,38..40,45,51
+VDC 16,21,39,41,45
R5P1
R5P2
10K
10K
U5C1
C5C1
1
1uF
4
2
74AHC1G08
3
2
+VDC_MCHVR
.002
5%
C5C5
4.7UF
R6C8 0
6225_BST2
3
6225_LG2
4
6225_PH2
Q5C2B
SI4966DY
6225_UG2
6225_BOOT2
6
5
6225_ISEN2
R5P10
2K_1%
VR_ON
32,37
1
6225_VSEN2
2
6225_OC2
6225_SS2
Q5C2A
SI4966DY
8
7
R6P1
100K_1%
C6C2
0.01UF
C6C1
0.1UF
CORE_VR_ON 39
Title
Intel 852GM GMCH VR and VCCP
Size
Project:
B
Date:
2
1
C6C8
10UF
CR6C1
BAT54WT1
C6C5
0.15UF
NO_STUFF_102276-100
+V1.35S_GMCH
9,46
TP6C1
L5C1
1
2
4.7uH
R6C11
NO_STUFF_0
R6P2
43.2_1%
1.35V_EV
46
C6P1
C6C3
R6P3
0.01UF
3.32K
NO_STUFF_1000PF
1%
R5P7
6.65K
1%
Document Number
Rev
Intel Celeron M / 852GM CRB
C26116
4.403
Wednesday, January 12, 2005
Sheet
43
of
51
1
D
C
B
A
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