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A
LVDS Interface
+V3.3S
3,5,6,8,9,11,15,17,18,20,21,23,26,31,33..36,38..40,43,45,51
+V3.3S_LVDS
4
R5N6
0.01_1%
R5N4
1M
1
7
LVDS_VDDEN
R5N3
100K
3
8,15,17,18,20,23..25,27,34,35,38..41,43,45,46
2
34
LVDS_BKLTSEL0
7
LVDS_BKLTCTL
R5B1
100K
7
LVDS_BKLTEN
R5B2
100K
1
A
B
Q5B2
+V3.3S_LVDS_PANEL
2
3
C5N1
C5B6
1000PF
0.1UF
R5N5
LVDS_VDDEN_D#
100K
Q5B1
BSS138
BIOS Note: Disable both
LVDS Panel Backlight
BKLTSEL lines before
enabling one.
3,5,6,8,9,11,15,17,18,20,21,23,26,31,33..36,38..40,43,45,51
8,15,17,18,20,23..25,27,34,35,38..41,43,45,46
+V5S
C5B3
U5B1
0.1UF
1
8
OE1#
VCC
2
7
LVDS_BKLTSEL1 34
1A
OE2#
3
6
1B
2B
4
5
GND
2A
SMB_DATA_D
74CBT3306
R5N2
No Stuff
LVDS_BRIGHTNESS
6,8,11,12,18
B
C
+V3.3S
3,5,6,8,9,11,15,17,18,20,21,23,26,31,33..36,38..40,43,45,51
+V3.3S_LVDSDDC
R6N5
0.01_1%
R6N3
2.2k
C5B7
7
LVDS_DDCPCLK
22UF
7
LVDS_DDCPDATA
7
LVDS_YAM0
7
LVDS_YAP0
7
LVDS_YAM1
7
LVDS_YAP1
7
LVDS_YAM2
7
LVDS_YAP2
7
LVDS_CLKAM
7
LVDS_CLKAP
7
LVDS_YBM0
7
LVDS_YBP0
7
LVDS_YBM1
7
LVDS_YBP1
7
LVDS_YBM2
7
LVDS_YBP2
7
LVDS_CLKBM
7
LVDS_CLKBP
+V3.3S
+V5S
R5N12
R5N8
.01
NO_STUFF_0.01_1%
1%
+V3.3S_LVDSBKLT
R5N1
0
SMB_DATA_S 6,8,11,12,18
NO_STUFF_0
LCLKCTLB 6..8
R5N9
0
SMB_CLK_D
SMB_CLK_S
6,7
LCLKCTLA
R5N10
NO_STUFF_0
No Stuff
C
D
R6N4
J6B1
2.2k
32
1
Test points for 24bpp support
2
3
4
5
7
LVDS_YAM3
6
7
LVDS_YAP3
7
8
9
10
11
12
13
7
LVDS_YBM3
14
15
7
LVDS_YBP3
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
LVDS,CONN30
+VDC
21,39,41,43,45
+V5S
R5N7
R5P3
NO_STUFF_.01
0.01_1%
1%
+VCC_LVDSBKLT
J5B1
1
2
3
4
5
6
7
INVERTER CONN
Title
LVDS
Size
Project:
A
Intel Celeron M / 852GM CRB C26116
Date:
Wednesday, January 12, 2005
D
E
R6C2
NO_STUFF_0
R6C1
NO_STUFF_0
8,15,17,18,20,23..25,27,34,35,38..41,43,45,46
Option to power
NO STUFF
backlight with
5.0V
Document Number
Rev
4.403
Sheet
16
of
51
E
4
3
2
1
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