AMD Am186 CC User Manual page 47

Figure 2-4 Memory and I/O Space
1 Mbyte
Notes:
1. 00000h–003FFh are reserved for the interrupt vector table.
2. 00F8h–00FFh are reserved.
2.5 INSTRUCTION SET
The instruction set for the Am186CC/CH/CU microcontrollers is identical to the 80C186/188
instruction set. An instruction can reference from zero to several operands. An operand can
reside in a register, in the instruction itself, or in memory. Specific operand addressing
modes are discussed on page 2-9. For instruction set details, see the Am186 and Am188
Family Instruction Set Manual , order #21267.
2.6 SEGMENTS
The microcontroller uses four segment registers:
1. Data Segment (DS): The processor assumes that all accesses to the program's
variables are from the 64K space pointed to by the DS register. The data segment holds
data, operands, and so on.
2. Code Segment (CS): This 64K space is the default location for all instructions. All code
must be executed from the code segment.
3. Stack Segment (SS): The processor uses the SS register to perform operations that
involve the stack, such as pushes and pops. The stack segment provides temporary
storage space.
4. Extra Segment (ES): Typically, this segment supports large string operations and large
data structures. Certain string instructions assume the extra segment as the segment
portion of the address. By using a segment override, the extra segment can also support
a spare data segment.
When a data movement instruction does not define a segment, the processor assumes a
data segment. An instruction prefix can override the segment register. For speed and
compact instruction encoding, the addressing mode implies the segment register used for
physical address generation (see Table 2-4).
Configuration Basics
FFFFFh
Memory
1
Space
00000h
Am186™CC/CH/CU Microcontrollers User's Manual
FFFFh
I/O
64 Kbyte
2
Space
0000h
2-7