AMD Am186 CC User Manual page 168

Register Set Manual , order #21916. Even when the ring size is set to 1, that entry is
still interpreted as a descriptor, not as the memory buffer itself.
5. Point to the first buffer descriptor by clearing the SDxCBD register to 0.
Program the Interrupt Conditions
The interrupt conditions are typically configured only once.
1. To generate an interrupt after receiving the last byte of the packet, set the REPI bit in
the SDxCON register to 1.
2. To generate an interrupt after detecting an unavailable buffer during reception, set the
RBUI bit in the SDxCON register to 1.
3. To generate an interrupt after receiving the last byte of the current buffer, set the RTCI
bit in the SDxCON register to 1. (Note that the RTCE bit in Word 2 of the transmit buffer
descriptor ring must also be set to 1.)
Add Data Buffers to the Receive Descriptor Ring
To place a data buffer in an entry in the receive buffer descriptor ring:
1. Find the first buffer descriptor for which the OWN bit is clear (bit = 0). This must be done
in a circular manner relative to the current buffer descriptor index. In systems where the
TXS0 or RXS0 bits are set, thereby inhibiting clearing of the OWN bits, software must
determine when it is safe to modify a descriptor ring entry.
2. Program the data buffer address.
a. Program the LADR bits in Word 0 to the low-order 16 address bits of the data buffer
pointed to by the descriptor.
b. Program the HADR bits in Word 1 to the high-order eight address bits of the data
buffer pointed to by the descriptor. The highest four bits of the address must be set to
0000b. These address bits do not exist on the Am186CC/CH/CU microcontrollers'
20-bit address but are provided for LANCE compatibility.
3. Program the data buffer size by setting the BCNT bits in Word 2 to the length in bytes
of the data buffer pointed to by the descriptor.
4. Initialize the receive buffer descriptor ring entries.
a. To enable interrupt on terminal count, set to 1 the RTCE bit in Word 2, or clear it to 0
to disable terminal count interrupt. (Note that the RTCI bit in the SDxCON register
must also be set to 1.)
b. Program the priority of this channel relative to other channels during simultaneous
transfers using the P bit in the SDxCON register. A 00b is a low priority; a 01b, medium;
and a 10b, high.
c. Set to 1 the OWN bit in Word 1 to indicate the descriptor entry is owned by the
SmartDMA channel.
d. To force a poll of the OWN bit of the current buffer descriptor, set to 1 the POLL bit in
the SDxCON register.
5. In the Am186CC microcontroller, when using SmartDMA channel 2 or 3, select one of
CC
two alternate sources by clearing the DSEL bit in the SDxCON register to 0 to select
HDLC or to 1 to select USB.
In the Am186CH HDLC microcontroller, the DSEL bit in the SDxCON register must be
CH
cleared to 0.
8-34
DMA Controller
Am186™CC/CH/CU Microcontrollers User's Manual