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Glossary
V
very short frame
During an HDLC transfer, a frame containing less than
two bytes (zero or one) between the start and stop flags.
W
wait state
A pause in a microprocessor's clock cycles that allows
for differences in speed between one component and
others in a computer (such as input/output devices or
RAM). Wait states are common in systems where the
microprocessor has a much higher clock speed than
other components, requiring the latter to play catch up.
During a wait state, the microprocessor idles for one or
more cycles while data comes in from RAM or other
components. Wait states also are not uncommon
between buses and devices connected to the bus.
WAN
Wide area network.
word
In the x86 environment, a group of 16 adjacent binary
digits (bits) or two bytes.
Z
zero-bit deletion
See bit unstuffing.
zero-bit insertion
See bit stuffing.
Glossary-10
Am186™CC/CH/CU Microcontrollers User's Manual
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