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Am79C930
AMD Am79C930 Manuals
Manuals and User Guides for AMD Am79C930. We have
1
AMD Am79C930 manual available for free PDF download: Preliminary Manual
AMD Am79C930 Preliminary Manual (161 pages)
Am79C930 PCnetTM-Mobile Single-Chip Wireless LAN Media Access Controller
Brand:
AMD
| Category:
IP Access Controllers
| Size: 0.71 MB
Table of Contents
Distinctive Characteristics
1
General Description
1
Ordering Information
2
Block Diagram
3
PCMCIA Mode
3
User4
3
Bus Interface Unit
4
Transceiver Attachment Interface Unit
5
Table of Contents
6
Pcmcia Block Diagram
12
Pcmcia Connection Diagram
13
Pcmcia Pin Summary
14
Listed by Pin Number
14
VDDM
14
Ma11
14
Ma15
14
Pcmcia Pin List
15
Listed by Pin Name
15
Vssm
15
Pcmcia Pin Function Summary
16
PCMCIA Pin Summary
16
Isa Plug and Play Block Diagram
19
Connection Diagram
20
ISA Plug and Play
20
Isa Plug and Play Pin List
21
Listed by Pin Number
21
Listed by Pin Name
22
Isa Plug and Play Pin Summary
23
Pin Descriptions
25
Pins with Internal Pull up or Pull down Devices
25
Configuration Pins
25
Host System Interface Pins
25
PCMCIA Bus Interface
26
Memory Interface Pins
26
ISA (IEEE P996) Bus Interface
27
Clock Pins
29
System Management Pins
29
TAI Interface Pins
29
Other Pins
31
IEEE 1149.1 Test Access Port Pins
32
Power Supply Pins
32
Analog Power Supply Pins
32
Digital Power Supply Pins
32
Multi-Function Pins
33
Vssm
33
Pin 1: USER2/LA19
34
Pin 2: USER3/SA16
34
Pin 3: USER4/LA17
34
Pin 45: STSCHG/BALE
34
Pin 90: USER0/RFRSH
34
Pin 91: USER1/IRQ12/EXTCTS/EXINT188
35
Pin 92: USER7/IRQ11
35
Pin 94: RXC/IRQ10/EXTA2DST
36
Pin 95: USER6/IRQ5/EXTSDF
36
Pin 96: USER5/IRQ4/EXTCHBSY
36
Pin 98: ACT
37
Pin 100: LNK
37
Pin 101: SDCLK
38
Pin 102: SDDATA
38
Pin 103: SDSEL3
38
Pin 105: SDSEL2
38
Pin 107: SDSEL1
38
Pin 115: TXC
39
Pin 118: LFPE
39
Pin 120: HFPE
39
Pin 122: RXPE
39
Pin 126: TXCMD
40
Pin 129: TXPE
40
Pin 131: TXMOD
40
Pin 132: ANTSLT
40
Pin 141: ANTSLT/LA23
40
Pin 142: TXCMD/LA21
41
Pin 143: TXDATA/LA20
41
Pin 144: LLOCKE/SA15
41
Functional Description
42
Basic Functions
42
System Bus Interface Function
42
Memory Bus Interface Function
42
Software Interface Function
42
Network Interface Function
42
Detailed Functions
42
Block Level Description
42
Bus Interface Unit
42
PCMCIA Interface
43
ISA (IEEE P996) Plug and Play Interface
44
Embedded 80188
45
Media Access Management
45
Medium Allocation
45
Memory Interface
45
Initialization
46
SRAM Memory Management
46
Bus Interface Unit Interaction
47
Flash Memory Management
47
Transceiver Attachment Interface Unit
47
Transceiver Attachment Interface Unit Management
47
Am79C930-Based TX Power Ramp Control
48
Tx Fifo
48
TX Power Ramp Control
48
RX CRC Checking
50
RX Data Parallelization
50
Rx Fifo
50
Start of Frame Delimiter Detection
50
Transceiver-Based TX Power Ramp Control
50
TX CRC Generation
50
TX Status
50
Bit Ordering
51
RSSI A/D Unit
51
RX Status Reporting
51
Baud Determination Logic
52
DC Bias Control
52
Physical Header Accommodation
52
Clear Channel Assessment Logic
53
Automatic Antenna Diversity Logic
54
IEEE 1149.1 Test Access Port Interface
55
TXC as Input
55
Boundary Scan Circuit
56
Boundary Scan Register (BSR)
56
Instruction Register and Decoding Logic
56
Other Data Registers
56
Power down Function
56
Power Saving Modes
56
Supported Instructions
56
Tap Fsm
56
Applicability to IEEE 802.11 Power down Modes
58
Software Access
58
Am79C930 System Interface Resources
58
PCMCIA Mode Resources
58
PCMCIA Attribute Memory Resources
61
PCMCIA I/O Resources
62
ISA Plug and Play Mode Resources
63
ISA Plug and Play Memory Resources
64
ISA Plug and Play I/O Resources
66
ISA Plug and Play Register Set
68
MAC (80188 Core) Memory Resources
70
MAC Firmware Resources
70
MAC (80188 Core) DMA Channel Allocation
72
MAC (80188 Core) Interrupt Channel Allocation
72
MAC (80188 Core) Memory Resources Restrictions
72
DMA Channel Allocation in the 80188 Core
73
Loopback Operation
73
LED Support
73
RESET Methods
73
RESET Pin
73
Swreset (Sir0[7])
73
Coreset (Sir0[6])
74
Pcmcia Cor Sreset
74
ISA Pnp RESET
75
Sres (Tir0[5])
75
Amd
47
Register Descriptions
75
System Interface Registers (SIR Space)
76
SIR0: General Configuration Register (GCR)
77
Notes
77
SIR1: Bank Switching Select Register (BSS)
78
SIR2: Local Memory Address Register [7:0] (LMA)
79
SIR3: Local Memory Address Register [14:8] (LMA)
79
SIR4: I/O Data Port a (IODPA)
79
SIR5: I/O Data Port B (IODPB)
80
SIR6: I/O Data Port C (IODPC)
80
SIR7: I/O Data Port D (IODPD)
80
MAC Interface Registers (mir Space)
80
MIR0: Processor Interface Register (PIR)
80
MIR1: Power up Clock Time [3:0] (PUCT)
81
MIR2: Power down Length Count [7:0] (PDLC)
81
MIR3: Power down Length Count [15:8] (PDLC)
81
MIR4: Power down Length Count [22:16] (PDLC)
82
MIR5: Free Count [7:0] (FCNT)
82
MIR6: Free Count [15:8] (FCNT)
82
MIR7: Free Count [23:16] (FCNT)
82
MIR8: Flash Wait States
83
MIR9: TCR Mask STSCHG Data
83
MIR10: Reserved
85
MIR11: Reserved
85
MIR12: Reserved
85
MIR13: Reserved
85
MIR14: Reserved
85
MIR15: Reserved
85
Transceiver Attachment Interface Registers (TIR Space)
86
TIR0: Network Control
89
TIR1: Network Status
89
TIR2: Serial Device
90
TIR3: Fast Serial Port Control
91
TIR4: Interrupt Register 1
91
TIR5: Interrupt Register
92
TIR6: Interrupt Unmask Register 1
93
TIR7: Interrupt Unmask Register 2
93
TIR8: Transmit Control
94
TIR9: Transmit Status
94
TIR10: TX FIFO Data Register
95
TIR11: Transmit Sequence Control
95
TIR12: Byte Count Register LSB
97
TIR13: Byte Count Register MSB
97
TIR14: Byte Count Limit LSB
97
TIR15: Byte Count Limit MSB
97
TIR16: Receiver Control
98
TIR17: Receive Status Register
98
TIR18: RX FIFO Data Register
99
TIR19: Reserved
99
TIR20: CRC32 Correct Byte Count LSB
99
TIR21: CRC32 Correct Byte Count MSB
99
TIR22: CRC8 Correct Byte Count LSB
100
TIR23: CRC8 Correct Byte Count MSB
100
TIR24: TCR Index Register
101
TIR25: Configuration Data Port
101
TIR26: Antenna Diversity and A/D Control
101
TIR27: Serial Approximation Register
102
TIR28: RSSI Lower Limit
103
TIR29: USER Pin Data
103
TIR30: Test Dummy Register
103
Tir31: Test
104
Amd
95
TAI Configuration Register Space (TCR)
104
TCR0: Network Configuration
104
TCR1: Transmit Configuration
104
TCR2: Clock Recovery
106
TCR3: Receive Configuration
106
TCR4: Antenna Diversity Timer
107
TCR5: TX Ramp up Timing
107
TCR6: TX Ramp down Timing
108
TCR7: Pin Data a
108
TCR8: Start Delimiter LSB
110
TCR9: Start Delimiter CSB
110
TCR10: Start Delimiter MSB
110
TCR11: Interrupt Register 3
111
TCR12: Interrupt Unmask Register 3
111
TCR13: Pin Configuration a
111
TCR14: Pin Configuration B
112
TCR15: Pin Configuration C
113
TCR16: Baud Detect Start
114
TCR17: Baud Detect Lower Limit
115
TCR18: Baud Detect Upper Limit
115
TCR19: Baud Detect Accept Count for Carrier Sense
116
TCR20: Baud Detect Accept Count for Stop Diversity
116
TCR21: Baud Detect Ratio
116
TCR22: Baud Detect Accept Count
117
TCR23: Baud Detect Fail Count
117
TCR24: RSSI Sample Start
117
TCR25: RSSI Configuration
118
TCR26: Reserved
120
TCR27: TIP LED Scramble
120
TCR28: Clear Channel Assessment Configuration
121
TCR29: Reserved
122
TCR30: Pin Function and Data Rate
122
TCR31: Device Revision
123
PCMCIA CCR Registers and PCMCIA CIS Space
124
PCMCIA Card Configuration and Status Register
124
PCMCIA Card Information Structure (CIS)
125
Absolute Maximum Ratings
126
Operating Ranges
126
DC Characteristics
126
5.0 V Am79C930 DC Characteristics
126
3.3 V Am79C930 DC CHARACTERISTICS
128
IEEE 1149.1 DC Characteristics (5.0 and 3.3 V)
130
Absolute Maximum Ratings
131
Operating Ranges
131
Ac Characteristics
131
And 3.3 V PCMCIA Interface AC Characteristics
131
Pcmcia Memory Read Access
131
Pcmcia Memory Write Access
132
Pcmcia I/O Read Access
133
Pcmcia I/O Write Access
134
And 3.3 V Isa Interface Ac Characteristics
135
Isa Access
136
Memory Bus Interface Ac Characteristics
137
Memory Bus Read Access
137
Memory Bus Write Access
138
Memory Bus Interface Ac Characteristics
139
Memory Bus Read Access
139
Memory Bus Write Access
140
Tai Interface Ac Characteristics
141
V Tai Interface Ac Characteristics
142
Tai Interface Ac Characteristics
144
And 3.3 V User Programmable Pins Ac Characteristics
146
And 3.3 V Ieee 1149.1 Interface Ac Characteristics
147
Analog-To-Digital (A/D) Converter Characteristics
147
Amd
148
Timing Waveforms
148
PCMCIA Bus Interface Waveforms
148
ISA Bus Interface Waveforms
150
Memory Bus Interface Waveforms
151
Clock Waveforms
152
Tai Waveforms
153
Programmable Interface Waveforms
154
Ieee 1149.1 Interface Waveforms
155
Ac Test Reference Waveforms
156
5.0 V PCMCIA AC Test Reference Waveform
156
5.0 V Non-Pcmcia Ac Test Reference Waveform
157
Physical Dimensions
158
APPENDIX A: Typical Am79C930 System Application
159
Device Configuration
159
Frame Transmission
160
Frame Reception
160
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