AMD Am186 CC User Manual page 338

Table A-1 Am186CC/CH/CU Microcontrollers Register Summary (Continued)
DEFAULT DEFAULT
15
NAME OFFSET
LOCATION VALUE
General-Purpose DMA Channel 0 Registers
GD0CON0 100h FD00h 0000h ST
GD0CON1 102h FD02h 0000h SM/IO
GD0SRCL 104h FD04h 0000h
GD0SRCH 106h FD06h 0000h
GD0DSTL 108h FD08h 0000h
GD0DSTH 10Ah FD0Ah 0000h
GD0TC 10Ch FD0Ch 0000h
General-Purpose DMA Channel 1 Registers
GD1CON0 110h FD10h 0000h ST
GD1CON1 112h FD12h 0000h SM/IO
GD1SRCL 114h FD14h 0000h
GD1SRCH 116h FD16h 0000h
GD1DSTL 118h FD18h 0000h
GD1DSTH 11Ah FD1Ah 0000h
GD1TC 11Ch FD1Ch 0000h
General-Purpose DMA Channel 2 Registers
GD2CON0 120h FD20h 0000h ST
GD2CON1 122h FD22h 0000h SM/IO
GD2SRCL 124h FD24h 0000h
GD2SRCH 126h FD26h 0000h
GD2DSTL 128h FD28h 0000h
GD2DSTH 12Ah FD2Ah 0000h
GD2TC 12Ch FD2Ch 0000h
General-Purpose DMA Channel 3 Registers
GD3CON0 130h FD30h 0000h ST
GD3CON1 132h FD32h 0000h SM/IO
GD3SRCL 134h FD34h 0000h
GD3SRCH 136h FD36h 0000h
GD3DSTL 138h FD38h 0000h
GD3DSTH 13Ah FD3Ah 0000h
DEFAULT DEFAULT
15
NAME OFFSET
LOCATION VALUE
! = See the register or bit description in the Am186™CC/CH/CU Microcontrollers Register Set Manual, order #21916, for controller-specific details.
14 13 12 11 10
AST TC INT Res
SAW
AST TC INT Res
SAW
AST TC INT Res
SAW
AST TC INT Res
SAW
14 13 12 11 10
9 8 7 6
P Res TS
SINC DM/IO
DSA[15–0]
Res
DDA[15–0]
Res
TC
P Res TS
SINC DM/IO
DSA[15–0]
Res
DDA[15–0]
Res
TC
P Res TS
SINC DM/IO
DSA[15–0]
Res
DDA[15–0]
Res
TC
P Res TS
SINC DM/IO
DSA[15–0]
Res
DDA[15–0]
Res
9 8 7 6
5 4 3 2 1
Res DSEL !
DAW DINC
DSA[19–16]
DDA[19–16]
Res DSEL !
DAW DINC
DSA[19–16]
DDA[19–16]
Res DSEL !
DAW DINC
DSA[19–16]
DDA[19–16]
Res DSEL !
DAW DINC
DSA[19–16]
DDA[19–16]
5 4 3 2 1
0
0