Configuring The Framing Format And Line Coding Format; Creating A Ts Set - HP FlexNetwork MSR Series Configuration Manual

When there is no VCPM on the main board, the configuration of each MIM/FIC is independent, but
the clock mode of only one interface can be set to line primary on a device.
Suppose that you remove the FIC on an interface whose clock mode is set to line primary without
powering it off and that you set the clock mode to line primary for another interface. In this case, if
you re-insert the FIC, the clock mode of the FIC is restored to internal, instead of remaining line
primary. In this way, there is only one interface whose clock mode is set to line primary on a device.
For example, after the FIC in slot 5 (interface 5/0) whose clock mode is set to line primary is
removed without being powered off and the clock mode of interface 6/0 is set to line primary, the
clock mode of interface 5/0 will be restored to internal, instead of being line primary, if the FIC is
re-inserted.
NOTE:
The line clock source and internal clock source are referred to as slave and master clock modes in
some features.
Configure a TDM clock source
To configure a TDM clock source for E1 interfaces:
Step
1. Enter system view.
2. Enter E1 interface view.
3. Configure a TDM clock
source for the E1 interface.

Configuring the framing format and line coding format

Step
1. Enter system view.
2. Enter E1 interface view.
3. Configure the framing
format.
4. Configure the line coding
format.
For more information about the controller e1, frame-format, and code commands, see HPE
FlexNetwork MSR Router Series Comware 5 Interface Command Reference.

Creating a TS set

Step
1. Enter system view.
2. Enter E1 interface view.
Command
system-view
controller e1 slot-number
tdm-clock { internal | line
[ primary ] }
Command
system-view
controller e1 slot-number
frame-format { crc4 | no-crc4 }
code { ami | hdb3 }
Command
system-view
controller e1 slot-number
64
Remarks
N/A
N/A
Optional.
By default, the TDM source clock
for an E1POS interface is line
TDM clock, and the TDM clock
source for other E1 interfaces is
the internal clock.
Remarks
N/A
N/A
Optional.
The default is non-CRC4.
Optional.
The default is HDB3.
Remarks
N/A
N/A