MULTICHANNEL BUFFERED SERIAL PORT TIMING (CONTINUED)
CLKS
CLKR
FSR (int)
FSR (ext)
DR
CLKX
FSX (int)
FSX (ext)
FSX (XDATDLY=00b)
DX
FLOATING POINT DIGITAL SIGNAL PROCESSOR
1
2
3
3
4
4
5
6
7
Bit(n-1)
2
3
3
9
11
10
13
14
12
13
Bit 0
Bit(n-1)
Figure 46. McBSP Timings
•
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251−1443
8
(n-2)
(n-3)
13
(n-2)
(n-3)
TMS320C6711D
SPRS292 − OCTOBER 2005
93