Texas Instruments TMS320C6711D User Manual page 25

Floating point digital signal processor
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PIN
NO.
SIGNAL
SIGNAL
TYPE †
TYPE †
NAME
GDP/
ZDP
EMU2
D3
I/O/Z
EMU1
B9
I/O/Z
EMU0
D9
RESET
A13
I
NMI
C13
I
EXT_INT7
E3
EXT_INT6
D2
I
I
EXT_INT5
C1
EXT_INT4
C2
† I = Input, O = Output, Z = High impedance, S = Supply voltage, GND = Ground, A = Analog signal (PLL Filter)
‡ IPD = Internal pulldown, IPU = Internal pullup. [To oppose the supply rail on these IPD/IPU signal pins, use external pullup or pulldown resistors
no greater than 4.4 kΩ and 2.0 kΩ, respectively.]
FLOATING POINT DIGITAL SIGNAL PROCESSOR
Terminal Functions (Continued)
IPD/
IPD/
IPU ‡
JTAG EMULATION (CONTINUED)
IPU
Emulation pin 2. Reserved for future use, leave unconnected.
For Emulation and normal operation, no external pullup/pulldown resistors are necessary. How-
ever for the Boundary Scan operation, pull down the EMU1 and EMU0 pins with a dedicated
1-kΩ resistor.
Emulation [1:0] pins.
• Select the device functional mode of operation
EMU[1:0]
Operation
00
Boundary Scan/Functional Mode (see Note)
01
Reserved
10
Reserved
IPU
11
Emulation/Functional Mode [default] (see the IEEE 1149.1
JTAG Compatibility Statement section of this data sheet)
The DSP can be placed in Functional mode when the EMU[1:0] pins are
configured for either Boundary Scan or Emulation.
Note: When the EMU[1:0] pins are configured for Boundary Scan mode, the
internal pulldown (IPD) on the TRST signal must not be opposed in order to
operate in Functional mode.
For the Boundary Scan mode drive EMU[1:0] and RESET pins low.
RESETS AND INTERRUPTS
Device reset. When using Boundary Scan mode on the device, drive the EMU[1:0] and RESET
−−
pins low.
This pin does not have an IPU on this device.
Nonmaskable interrupt
• Edge-driven (rising edge)
IPD
Any noise on the NMI pin may trigger an NMI interrupt; therefore, if the NMI pin is not used, it is
recommended that the NMI pin be grounded versus relying on the IPD.
General-purpose input/output pins (I/O/Z) which also function as external
General-purpose input/output pins (I/O/Z) which also function as external
interrupts
interrupts
• Edge-driven
Edge-driven
IPU
IPU
• Polarity independently selected via the External Interrupt Polarity Register
• Polarity independently selected via the External Interrupt Polarity Register
bits (EXTPOL.[3:0]), in addition to the GPIO registers.
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251−1443
TMS320C6711D
SPRS292A − OCTOBER 2005 − REVISED NOVEMBER 2005
DESCRIPTION
DESCRIPTION
25

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