Texas Instruments TMS320C6711D User Manual page 24

TMS320C6711D
FLOATING POINT DIGITAL SIGNAL PROCESSOR
SPRS292A − OCTOBER 2005 − REVISED NOVEMBER 2005
PIN
NO.
SIGNAL SIGNAL
TYPE † TYPE †
NAME
GDP/
ZDP
CLKIN A3 I
CLKOUT2
Y12 O/Z
(/GP0[2])
CLKOUT3 D10 O
CLKMODE0 C4 I
PLLHV C5 A
TMS B7 I
TDO A8 O/Z
TDI A7 I
TCK A6 I
TRST §
B6 I
EMU5 B12 I/O/Z
EMU4 C11 I/O/Z
EMU3 B10 I/O/Z
† I = Input, O = Output, Z = High impedance, S = Supply voltage, GND = Ground, A = Analog signal (PLL Filter)
‡ IPD = Internal pulldown, IPU = Internal pullup. [To oppose the supply rail on these IPD/IPU signal pins, use external pullup or pulldown resistors
no greater than 4.4 kΩ and 2.0 kΩ, respectively.]
§ To ensure a proper logic level during reset when these pins are both routed out and 3−stated or not driven, it is recommended an external 10-kΩ
pullup/pulldown resistor be included to sustain the IPU/IPD, respectively.
24
Terminal Functions
IPD/ IPD/
IPU ‡ ‡
CLOCK/PLL
IPD Clock Input
For this device, the CLKOUT2 pin is multiplexed with the GP[2] pin.
Clock output at half of device speed (O/Z) [default] (SYSCLK2 internal signal from the clock
generator) or this pin can be programmed as GP[2] (I/O/Z).
IPD
When the CLKOUT2 pin is enabled, the CLK2EN bit in the EMIF global control register
(GBLCTL) controls the CLKOUT2 pin (All devices).
CLK2EN = 0: CLKOUT2 is disabled
CLK2EN = 1: CLKOUT2 enabled to clock [default]
IPD Clock output programmable by OSCDIV1 register in the PLL controller.
Clock generator input clock source select
0 − Reserved. Do not use.
IPU 1 − CLKIN square wave [default]
For proper device operation, this pin must be either left unconnected or externally pulled up with
a 1-kΩ resistor.
Analog power (3.3 V) for PLL
JTAG EMULATION
IPU JTAG test-port mode select
IPU JTAG test-port data out
IPU JTAG test-port data in
IPU JTAG test-port clock
JTAG test-port reset. For IEEE 1149.1 JTAG compatibility, see the IEEE 1149.1
IPD
JTAG Compatibility Statement section of this data sheet.
IPU Emulation pin 5. Reserved for future use, leave unconnected.
IPU Emulation pin 4. Reserved for future use, leave unconnected.
IPU Emulation pin 3. Reserved for future use, leave unconnected.
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DESCRIPTION DESCRIPTION