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A
S
BOUT THE
ERVER
[1.3.195] GPIO List (Continued)
I
P
#
P
N
TEM
IN
IN
AME
33
B24
GPIO32
34
F25
GPIO33
35
F25
GPIO34
36
B31
GPIO35_NMI_N
37
C25
SATA2GP_GPIO36
IO
P
OWER
PU/PD
R
ECOMMENDATIONS
TYPE
WELL
(
REFERENCE DESIGN
"In Main Power Well.
I
P1V1_SSB
PU
Unmuxed. Defaults to
Native. "
"In Main Power Well.
I
P1V1_SSB
PU
Unmuxed. Defaults to
GPO."
"In Main Power Well.
Muxed with STP_PCI.
Defaults to GPI. If not
O
P1V1_SSB
NA
used, require a weak pull-
up (8.2kohm to 10kohm) to
Vcc3_3"
"In Main Power Well.
O
P1V1_SSB
PU
Muxed with NMI#. Defaults
to GPO. "
"In Main Power Well. Can
instead be used as
SATA[3:2]GP. Defaults to
I
P1V1_SSB
PU
GPI. If not used, require a
weak pull-up (8.2kohm to
10kohm) to Vcc3_3"
V
A
ENDOR
LTERNATE
U
SED
FUNCTION
FUNCTION
)
(D
)
EFAULT
GPIO32
GPI
(Native)
GPIO33
GPI
(GPO)
GPIO34
GPO
(GPI)
NMI_N
GPO
(GPO)
SATA2GP
GPI
1-65
N
STATE
ET
NET
AFTER
CONNECT
NAME
RESET
TO
Connect
to PCIE
PCIE_SL
slot2 and
OT2_PRE
high
PU to
SENT_N
P3V3 via
10K
Connect
to PCIE
TP_PBG_
slot3 and
high
P3V3
GPIO33
PU to
P3V3 via
10K
FM_VIDE
O_DISAB
N/A
BMC
N/A
LE_N
BMC,
and pull
FM_NMI_
N/A
up P3V3
P3V3
EVENT_N
via
4.7Kohm
Pull up
PU_PBG_
P3V3 via
high
P3V3
GPIO36
330Koh
m
GPIO L
IST
PCIE
slot2
pres-
ent pin
PCIE
slot3
pres-
ent pin
BMC
Video
disable
SYS-
TEM
NMI
EVENT
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