LPC
The Low Pin Count Interface was defined by Intel
sition towards legacy free systems. It allows the integration of low-bandwidth legacy I/O com-
ponents within the system, which are typically provided by a Super I/O controller. Furthermore,
it can be used to interface firmware hubs, and embedded controller solutions. Data transfer on
the LPC bus is implemented over a 4 bit serialized data interface, which uses a 33MHz LPC
bus clock. For more information about LPC bus refer to the Intel
Specification Revision 1.1'.
Chapter 5 Ports and Connectors
Chapter 5
LAD0
LPC
LAD1
VCC3
GND
10
2
9
1
LDA2
CLK
LAD3
RST#
FRAME#
Corporation to facilitate the industry's tran-
®
Low Pin Count Interface
®
Expansion Slots
Mini PCI Express
Mini PCIe Slot
Install Mini PCI Express cards such as network cards or other cards that comply to the Mini
PCI Express specifications into the Mini PCI Express slot.
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