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LPC Connector
The Low Pin Count Interface was defined by Intel
sition towards legacy free systems. It allows the integration of low-bandwidth legacy I/O com-
ponents within the system, which are typically provided by a Super I/O controller. Furthermore,
it can be used to interface firmware hubs, Trusted Platform Module (TPM) devices and embed-
ded controller solutions. Data transfer on the LPC bus is implemented over a 4 bit serialized
data interface, which uses a 33MHz LPC bus clock. For more information about LPC bus refer
to the Intel
Low Pin Count Interface Specification Revision 1.1'. The table below indicates the
®
pin function of the LPC connector.
Pins
Pin Assignment
L_CLK
1
L_RST#
3
L_FRAME#
5
L_AD3
7
L_AD2
9
INT_SERIRQ
11
5VSB
13
Chapter 5 Ports and Connectors
LPC
14 13
2 1
Corporation to facilitate the industry's tran-
®
Pins
Pin Assignment
L_AD1
2
L_AD0
4
3V3
6
8
GND
10
Kev
12
GND
5V
14
Chapter 5
Battery
The lithium ion battery powers the real-time clock and CMOS memory. It is an auxiliary source
of power when the main power is shut off.
Safety Measures
• Danger of explosion if battery incorrectly replaced.
• Replace only with the same or equivalent type recommend by the manufacturer.
• Dispose of used batteries according to local ordinance
30
Battery
.
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