ZiLOG System 8000 Hardware Reference Manual page 335

HRM
TEST NAME
Zilog HRM
MMUTST5 - a series of tests of the MMUs
PARAMETERS
None
DESCRIPTION
MMUTST5 performs a series of tests
on
the MMUs. For each
test, MMUTST5 displays a message informing the user that it
i
03
abo ut to beg in the t est. Th e t est s a r
~
per f
0 2' "
~n
ed ,)
(l
e r:1 ,~ I1
of the three MMUs (CODE, DATA and STACK) unless ot~e~~i3~
specified.
(1) A block random data test, where 256 bytes of random
data are written to memory, read back,
8nd
compared.
(2) A SDR test, where random data is written to each SDR,
then read and ·verified.
(3) A "55
1
35" and "AAAA" data test on all MMUs.
(~) A CONTROL register test, where random data is written
to each control register, then read and verified.
(5) A test of the read-only flag, in the DATA and STACK MMU
SDR'.3 . .
(6) A test of the LIMIT register, in the DATA and STACK MMU
3DR'3 . .
(7)
A test of the DIRW flag, in the DATA and STACK MMU
SDR"s.
(8) A test of address translation using each SDR.
ERROR
MESSJ~GES
MMUTST5 displays messages whenever an access violation
causes a segment trap. The messages indicate where the
~MU
error occurred.
All MMUTST5 errors are reported to SADIE as HARD errors.
A-104
2ilog
A-104