HRM
Zilog
HRM
4.5.2.
Winchester
Disk
Controller:
The
Disk
Controller
controls the fully buffered transfer of data between the CPU
(host) and a selected disk drive.
The block diagram in Fig-
ure
4-3
shows
the relationship between the controller and
both the ZBI and the disk drives.
All transactions
between
the
controller
and the host pass through connectors P1 and
J13 and over the ZBI.
Transactions between
the
controller
and
a
selected
disk
drive pass through connectors P2 and
J23, the drive bus.
The signals on
connector
P1
are
the
standard
ZBI
signals; the signals on P2 are common to only
slot three on the back plane.
Table 4-13 lists
the
inter-
face
signals
between
the
disk
controller
and
the disk
drives.
.
4.5.2.1 CPU Interface:
The CPU communicates with
the
con-
troller
through
16
8-bit
command
registers and an 8-bit
command-status (CIS) register (Figure 4-4).
Each
register
has
a
specific
command assignment and a specific address.
The CPU writes commands into command registers xxOO
through
x
x0F ;
the con t roll err e ad s the s ere g is t e r san d per f
0
r~m
s the
specified commands.
The controller places
the
results
or
status
of
the
specified command in the CiS register which
the CPU reads.
Table 4-14 lists the command and CiS
regis-
ter s.
The command and CiS registers reside in the CPU's IIO
space
on
any
256-word boundary.
Within this 256-word block, the
command registers are at "relative
addresses
xxOO
to
xxOF
hexadecimal
and
the CIS register at address xx10.
The two
most significant hex values of the address, xx, can
be
set
by
j urn per son
the c () nt roll e r boa rd.
Ta b
1
e 4- 15
1
i s t s the
jumpers and the bits (15 through 8) that
the
jumpers
con-
trol.
This
scheme allows more than
one controller within
the same IIO space.
Figure 4-5 shows a segMent of IIO
space,
containing
three
256-word
blocks.
The two most significant hexadecimal nib-
bles (AA, BE, and CC) of the addresses can be set
by
using
the
jumpers
listed
in
Table
4-15.
For example, in the
address AAOO, if AA is to equal FF hex, then
no
jumper
is
connected in any of the jumper groups, and all the lines are
high.
When a jumper is connected in any jumper
group,
the
jumper shorts its associated line to ground, a low level.
The controller can accommodate either 2716 or
2732
EPROMs.
Jumpers on the control:er board permit the selection of both
the type of EPROM and any necessary wait states.
Tabl~
4-16
lists the jumpers for memory selections.
4-16
Zilog
4-16
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