Memory Subsystem Controller, Functional Relationships - ZiLOG System 8000 Hardware Reference Manual

HRM Zilog
HRM
1 M
ECC MEMORY
1M
ECC MEMORY
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0;;:101; - - - - - - - - - -
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: EGG
~~MORY
] EGG
~~MORY
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MEMORY BUS CONNECTOR P2/J2
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BACKPLANE SLOTS: J28-J30
OR J26·J30
MEMORY
SUBSYSTEM
CONTROLLER
" 7
P1/J1
Z·BUS BACKPLANE INTERCONNECT (ZBI)
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00159
Figure 4-10 Memory SUbsystem Controller,
Functional Relationships
BIT 38
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BIT 31
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BIT 23
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BIT 15
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BIT 07
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BIT 00
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CHECK BITS BYTE 0
BYTE 1 BYTE 2 BYTE 3
CHECK BIT!~ BYTE 4 BYT.E 5
BYTE
6
BYTE 7
CHECK BlTn BYTE 8 BYTE 9 BYTE 10
BYTE 11
(ADDITIONAL BYTES)
CHECK BITS
BYTE N·3 BYTE N·2 BYTE N·1 BYTE N
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BIT 38
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BIT 31
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BIT 23
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BIT 15
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BIT 07
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BIT 00
o
0 170
Figure 4-11 Memory Organization
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Zilog
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