Central Processing Unit; Sigma 6 Central Processing Unit - Xerox Sigma 6 Reference Manual

CENTRAL PROCESSING UNIT
This section describes the organization and operation of
the SIGMA 6 central processing unit in terms of informa-
tion processing and program control, instruction and data
CPU fAST MEMORY
GENERAL REGISTER BLOCK (nPiCALI
o
I .... ________
~
1~:n~:n~§I~&~m~@~@~@~Th~~@~%~~@~@~ru~w~M~a~
2
1:~~:::::fII:J:~:lJlI:l:jiI:Il~:~:~::II:1I::ililil:::lilmI1lljIIlllll\llllllItm!ililti::1
3
lil!!:i!!!i:[!I[ttlllIililili!il@ttilIi!illi:it}!ttitl:1!~@!IMI1!@!!i!i!Ii!i!{fi!1
4
1?:::Iffl:::l:::Ijljl!i!ill:iImt:1:::I1~iI::fliJi::~l:lIllIlllIIiIi}}tIIl
Index
~
Registers
5
1 : } I : : : i : : t : : : ~ l : : i i ~ : : i i i i i : i ~ i i l i l i i i l ! i l l : l \ l \ l l l i I l i l i ~ i l : ~ i ~ i ~ \ 1 ! 1 : 1 \ ~ \ 1 l I 1 l 1 l 1 l t j l l : l : l l j : l t t t l : l : t l t : : 1
formats, indirect addressing and indexing, memory mapping
and protection, overflow and trap conditions, and inter-
rupt control. Basically, the SIGMA 6 CPU consists of
a fast memory and an arithmetic and control unit (see
Figure
3).
ARITHMETIC AND CONTROL UNIT
INSTRUCTION REGISTER
o
Indirect Address Flag
o
III I III I
Operation Code Field
I 7
ITTIJ
General Register Designator
8 11
ITIJ
Index Register Designator
12 ,.
Reference Address Field
11111111111111111111
I
6
1:::t:!!I:t:I:I:Iiili!11!il!lljlIll\illllllllilttIi:lilIJliti!tI::1il!:::!Illl!tl!lH
7
f))))))):))))!)!!i~!:r!I:l)ijl)l)!)~!)ljl)~I!!!lj~~IIjjjljljj!j!j!j)))))jI)I!lj:)))I1)!1!Iijj)~1!~~))liI)j)lI!J
15 31 . •
To/From
..... ~--...-jt~
Core Memory
I
I.. •
To/From
a
9
10
11
12
13
14
15
~
I
]
~------------------~ ~
~------------------~3' ~
MEMORY CONTROL STORAGE
Memory Map
I -
256 a-bit page addresses
---t
Memory Access Protection
III1I111I1111
~ ~--+-I""-'-II"""'-II
I---
256 2-bit access codes ~
Memory Write Protection
II1II1III1I11
~~~II~III
l----
256 2-bit write locks
---I
31-digit
Decimal
Accumu-
lator
-
I
I/O Processors
I
• Read/Write
Direct
I
__ Interrupts
Priority Interrupt System
Write Direct
PROGRAM STATUS DOUBLEWORD
rrrn
Condition Code
o
3
ITTI
Flooting-point Mode Control
S 7
o
Master/Slave Mode Control
o
Memory Map Control
9
OJ
Arithmetic Trap Masks
10
\I
Instructian Address
111111111111111111
IS 31
OJ
Write Key
343S
OTI
Interrupt Inh ibits
37 39
III III
Register Block Pointer
ss
59
Figure 3. SIGMA 6 Central Processing Unit
10 Central Processing Unit
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