Xerox Sigma 6 Reference Manual page 144

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Note: For each entry in this index, the number of the most significant page is listed first.
Any pages thereafter are listed in
numerical sequence.
G
general characteristics, 1
general registers, 11,6
general-purpose features, 5
H
hal fword, format, 8
immediate addressing, 12
immediate operand, 12
indexed reference address, 13
indexing, 13
index registers, 13, 10
indirect addressing, 13, 11
information format, 8
inhibits, interrupt, 18, 19,81
inhibits, push-down trap, 68
input/output
address, 82,88
commands, 90
command doubleword, 90,83
flags, 91,92
instructions, 82-88
interrupt, 19,91,92
operations, 89-92
status information, 82,83
un it address assignments, 82
instruction format, 11
i nstru ct ions, 28 -88
Ana I yze/Interpret, 37,38
Branch, 72-74
byte string, 60-67, 125
Call, 74,6,27,77
comparison, 44-46
control, 75-82
conversion, 49,6,50
decimal, 54-60
Execute/Branch, 72-74
fixed-point arithmetic, 39-44
floating-point arithmetic, 50-54,24, 122, 123
format, 11
input/output, 82-88
Interpret, 38,6
load/store, 31-37
logical, 46
nonexistent, 22,23,76
privileged, 75-88
push-down, 67-72,25
Shift, 47-49, 124
translate, 63,6
unimplemented, 24,23,52
interleave/overlap, 97
Interpret instruction, 38,6
interrupt
active, 21
armed, 20,81
136
Index
L
channel end, 92
control panel, 94, 19
counter-equal s-zero, 19
count-pulse, 18, 19
device, 83,88
disabled, 20,81
disarmed, 20,81
enabled,20,81
external, 20
inhib its, 18, 19,81
input/output, 19,91,92
internal, 18
locations, 19
override, 18, 19
priority chain, 18
single-instruction, 22
states, 20
system, control of, 20, 18,81
time of occurrence, 21
trigger, 82
unusual end, 88, 92
waiting, 20
zero byte count, 88,91
loading process
access protection, 78
core memory, 98
memory map, 78
write protection, 79
load/store instructions, 31-37
logical instructions, 46
logical shift, 47
M
master mode, 9, 17
memory
access protection, 14, 11, 15, 78
addresses, 8
control, 11, 14
fast, 9
fault indicators, 97,80
map, 11, 14,78
nonexistent address trap, 23,24
nonexistent addresses, 24,23
parity error, 85,88,97
protection violation trap, 23,24,76
write locks, 15, 11,79
write protection, 11, 14, 15,79
memory mapi 11, 14, 17,78
control image, 78
loading process, 78
multiplexor lOP (MIOP), 89,3,5
multiplexor lOP (MIOP) expansion option, 89,3,5
multiuse features, 6

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