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the decimal byte is a sign code, the computer
automatically aborts execution of EBS and traps
to location X ' 45
1
as described above.
d.
One of the following editing actions is performed.
Conditions
Pattern byte=SI(X I 23 1 )
Pattern byte = SS(XI211)
CC4::= 1
Pattern byte = 55
CC4::= 0
nonzero digit
Pattern byte = 55
CC4 = 0
digit ::= 0
Pattern byte
=
DS(X 120 1 )
CC4
=
1
Pattern byte = DS
CC4::= 0
nonzero digit
Pattern byte::= DS
CC4::= 0
digit ::= 0
Action
Expand digit to zoned
format, store in pat-
tern byte location,
and set CC4 to 1 (start
significance)
Expand digit to zoned
format and store in pat-
tern byte location (be-
cause CC4::= 1 means
significance already
encountered
Expand digit to zoned
format, store in pattern
byte I ocati on, (because
nonzero digit begins
significance) and set
CC4 to 1
Store fi
II
character in
pattern byte location
(because significance
starts wi th next pattern
byte) and set CC4 to 1
Expand digit to zoned
format, and store digit
in pattern byte location
Expand digit to zoned
format, store digit in
pattern byte location,
and set CC4 to 1 to
signal significance
Store fi
II
character in
pattern byte location
(because significance
not encountered yet)
Mark
Mode
1
None
Model
Mode 2
None
Mode 1
None
e.
If CC2 is currently reset to 0 and if bits 4-7 of the
decimal byte are a positive decimal sign code,
CC1 is set to 1, CC4 is reset to 0, and the source
address in register R is incremented by 1. If CC2
is currently reset to 0 and if bits 4-7 of the deci-
mal byte are a negative decimal sign code, CC1
and CC4 are both set to 1, and the source address
is incremented by 1. Otherwise, Ce2 is added to
the source address and then CC2 is inverted.
f.
If marking is invoked at step d, above, one of the
two following marking operations are performed:
Mode 1: load bits 13-31 of register R+ 1 into bit
positions 13-31 of register 1; bit positions
0-12 of register are unpredictable.
Mode 2: Load bits 13-31 of register R+1 into bit
positions 13-31 of register 1 and then
66
Byte-String Instructions
3.
4.
increment the contents of reg ister 1
by
1;
bit posirions 0-12 of register 1
are unpredictable.
If marking is not applicable (i.e., significance
~
not been encountered, the contents of register'
are not affected.
If the pattern byte is a field separator (X I 22 1 ), the fi II
character is stored in the pattern byte location.
CC 1,
CC3, and CC4 are all reset to OIS, and CC2 remains
unchanged.
If the pattern byte is not a digit selector, significance
start, immediate significance start or field separator,
one of the following actions are performed:
Conditions
CCI
=
a
CC4
=
a
CC1 ::= 1
CC4::=
a
CC4
=
1
Action
store
fj
II character in pattern byte
location
store blank character (X 140
1
)
in pattern
byte location
none (pattern byte remai ns unchanged)
5.
Increment the destination address in register Ru 1, de-
crement the count in register Ru 1. If the count is still
nonzero, process the next pattern byte as above, other-
wise, execute the next instruction in sequence.
Affected: (R), (Rul)
Traps: Decimal arithmetic
(register 1), (DBS),CC
edited (SBS) - - DBS
Condition code settings:
2
3
4
Result of EBS
- - - - - -
o
o
o
a
o
significance is not present, no sign digit
has been encountered
significance is present, no sign digit has
been encountered
o
a positive sign has been encountered
a negative sign has been encountered
next digit to be processed is left digit
of byte
next digit to be processed is right digit
of byte
no nonzero digit has been encountered
a nonzero di git has been encountered
If EBS is indirectly addressed, it is treated as a nonexistent
instruction, in which case the computer unconditionally
aborts execution of the instruction (at the time of operatiol
code decoding) and traps to location X ' 40 ' with the
conte~
of register R, register Ru1, register 1, the destination byte
string, and the condition code unchanged.
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