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Case II: odd R field (Rul=R)
Contents of register R
Count
o
i
2
314
S
The source byte string begins with the byte location
pointed to by the address in register R plus the displace-
ment in CBS; the destination byte string begins with the byte
location pointed to by the destination address in register R.
Both byte strings are C bytes in length.
Case III: zero R field (Ru1=1)
Contents of register
The source byte string consists of a single byte, the contents
of the location pointed to by the displacement in CBS; the
destination byte string begins with the byte location pointed
to by the destination address in register 1 and is C bytes in
length.
In this case, the source byte is compared with each
byte of the destination byte string until an inequality is found.
IBS
TRANSLATE BYTE STRING
(Immediate displacement, continue after interrupt)
TRANSLATE BYTE STRING replaces each byte of the des-
tination byte string with a source byte located in a transla-
tion table.
The destination byte string begins with the byte
location pointed to by the destination address in register
Ru 1, and is C bytes in length.
The translation table con-
sists of up to 256 consecutive byte locations, with the first
byte location of the table pointed to by the displacement
in TBS plus the source address in register R.
A source byte
is defined as that which is in the byte location pointed to
by the 19 low-order bits of the sum of the following values:
1.
The displacement in bit positions 12-31 of the TBS
instruction.
2.
The current contents of bit positions 13-31 of register
R (source address).
3.
The numeric value of the current destination byte, the
8-bit contents of the byte location pointed to by the
current desti nation address in bit positions 13-31 of
register (Ru 1).
Affected: (DBS) ,(Ru 1)
translated (DBS) -
DBS
If
TBS is indirectly addressed, it is treated as a nonexistent
instruction, in which case the computer unconditionally
aborts execution of the instruction (at the time of operation
code decoding) and traps to location X ' 40 ' with the contents
of regi ster R and the destination byte string unchanged.
Case I: even, nonzero R field (Ru 1 =R+ 1)
Contents of register R
Contents of register R+ 1
The destination byte string begins with the byte location
poi nted to by the desti nati on address in regi ster R + 1 and is C
bytes in length.
The source byte string (translation table)
begins with the byte location pointed to by the displacement
in TBS plus the source address in register R.
When the in-
struction is completed, the destination address is incremented
by C, Cis set to zero, and the source address remai ns
unchanged.
Case II: odd R field (Ru 1 =R)
Because of the interruptible nature of TRANSLATE BYTE
STRING, the results of the instruction are unpredictable
when an odd-numbered general register is specified by the
R field of the instruction word.
Case III: zero R field (Ru1=1)
Contents of register
The destination byte string begins with the byte location
pointed to by the destination address in register 1 and is C
bytes in length.
The source byte string (translation table)
begins with the location pointed to by the displacement in
TBS.
When the instruction is completed, the destination
address is incremented by C and Cis set to zero.
TTBS
TRANSLATE AND TEST BYTE STRING
(Immediate displacement, continue after interrupt)
TRANSLATE AND TEST BYTE STRING compares the mask in
bit positions 0-7 of register R with source bytes in a byte
translation table.
The destination byte string begins with
the byte location pointed to by the destination address in
register Ru 1, and is C bytes in length.
The byte transla-
tion table and the translation bytes themselves are identical
to that described for the instruction TRANSLATE BYTE
STRIN G.
The destinati on byte string is examined (without
being changed) unti
I
a translation byte (source byte) is found
that contains a 1 in any of the bit positions selected by a 1
in the mask.
When such a translation byte is found, TTBS
replaces the mask with the logical product (AND) of the
translation byte and the mask, and terminates with CC4 set
to i.
If
the TTBS instruction terminates due to the above
Byte-String Instructions
63
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