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UNIMPLEMENTED FLOATING-POINT INSTRUCTIONS
~S
If the optional floating-point instruction set is not imple-
mented in the computer and execution of a floating-point
arithmetic instruction is attempted, the computer uncondi-
ti onall y aborts execution of the instruction (at the time of
operation code decoding).
The computer then traps to lo-
cation X ' 41
1
,
with the contents of the condition code and
all general registers unchanged.
Location X'41' is the
"unimplemented instruction" trap location.
FLOA TlNG·-POINT ADD AND SUBTRACT
The floating normalize (FN), floating zero (FZ), and floati ng
significance (FS) mode control bits determine the operation of
floating-point addition and subtraction (if characteristic
overflow does not occur) as follows:
FN Floating normalize:
FN
=
a
The results of additions and subtractions are
to be postnormalized. If characteristic under-
flow occurs, if the result is zero, or if more
than two postnormalization hexadecimal shifts
are required, the setti ngs for FZ and FS de-
termine the resultant action.
If
none of the
above conditions occur, the condition code
is set to 0010 if the result is positive or to
0001 if the result is negative.
FN
=
1
Inhibit postnormalization of the results of ad-
ditions and subtractions.
The settings of FZ
and FS have no effect on the i nstructi on op-
eration. If the result is zero, the result is
set to true zero and the condition code is set
to 0000. If the result is positive, the con-
dition code is set to 0010. If the result is
negative, the condition code is set to 0001.
FZ
Floating zero: (applies only if FN
=
0)
FZ
=
a
If the final result of an addition or subtrac-
tion operation cannot be expressed in normal-
ized form because of the characteristic being
reduced below zero, underflow has occurred,
in which case the result is set equal to true
zero and the condition code is set to 1100.
(Exception: if a trap results from significance
checking with FS
=
1 and FZ
=
0, an under-
flow generated in the process of postnormal-
izing is ignored.)
FZ
=
1
Characteristi c underflow causes the computer
to trap to I ocati on X '44' with the contents of
the general registers unchanged. If the result
is positive, the condition code is set to 1110.
If
the result is negative, the condition code
is set to 110 1 .
FS
Floating significance: (applies only if FN
=
0)
FS -=
a
Inhibit signifi-ance trap. If the result of an
addition or subtraction is zero, the result is
52
Floating-Point Arithmetic Instructions
set equal to true zero, the condition code is
set to 1000, and the computer executes the
next instruction in sequence.
If
more than
two hexadecimal
place~
of postnormalization
shifting are required one characteristic under ....
flow does not occur, the condition code is set
to 1010 if the result is positive, or to 1001 if
the result is negative; then, the computer exe-
cutes the next instruction in sequence.
(Ex-
ception: if characteristic underflow occurs
with FS
=
0, FZ determines the resultant action.)
FS
=
1
The computer traps to location X'44' if more
than two hexadecimal places of postnormal-
ization shifting are required or if the result is
zero.
The condition code is set to 1000 if the
result is zero, to 1010 if the result is positive,
or to 1001 if the result is negative; however,
the contents of the general registers are not
changed. (Exception: if a trap results from
characteristic underflow wi th FZ
=
1, the re-
sults of significance testing are ignored.)
If
characteristic overflow occurs, the CPU always traps to
location X'44' with the general registers unchanged and the
condition code set to 0110 if the result is positive, or to
0101 if the result is negative.
FLOATING-POINT MULTIPLY AND DIVIDE
The floating zero (FZ) mode control bit alone determines
the operation of floating-point multiplication and division
(if characteristic overflow does nqt occur and division by
zero is not attempted) as follows:
FZ Floating zero:
FZ
=
a
If the final result of a multiplication or divi-
sion operation cannot be expressed in normal-
ized form because of the characteristic being
reduced below zero, underflow has occurred.
If underflow occurs, the result is set equal to
true zero and the condition code is set to 1100.
If
underflow does not occur, the condition code
is set to 0010 if the result is positive, to 0001
if the result is negative, orto 0000 if the result
is zero.
FZ
=
1
Underflow causes the computer to trap to loca-
tion X'44' with the contents of the general
registers unchanged. The condition code is
set to 1110 if the result is positive, or to 1101
if the result is negative.
If
underflow does
not occur, the resultant action is the same
as that for FZ
=
O.
If
the divisor is zero in a floating-point division, the com-
puter always traps to location X'44' with the general reg-
isters unchanged and the condition code set to 01 00. If
characteristic overflow occurs, the computer al ways traps
to location X'44' with the general registers unchanged and
the condition code set to 0110 if the result is positive, or
to 0101 if the resu It is negative.
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