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2.2
PicoPower Vesuvius-LS Chipset
The VESUVIUS platform is a high-performance, highly integrated system solution for IBM-AT-
compatible computers offering universal support for Intel's 3.3-V Pentium processor and
comparable 64-bit processors from AMD and Cyrix. Based on a PCI Local Bus native architecture,
it offers a superior, power-efficient solution for both desktop and portable computers.
VESUVIUS is a native PCI system controller solution for the 3.3-V 75-, 90-MHz and 100- MHz
Pentium processors from Intel. It connects the Pentium processor bus to the industry-standard PCI
Local Bus and provides a bridge between the PCI and ISA busses to support popular ISA bus
peripherals.
The VESUVIUS platform supports a full product line by offering different options to implement the
second level cache and the DPAM subsystems. The VESUVIUS system solution also supports a
cacheless system configuration by providing a sophisticated DRAM controller that supports leading
edge DRAM technology.
The V1-LS and V2-LS provide a native PCI interface to the Pentium processor bus along with a
64-bit L2 cache controller and a 64- and 32-bit mixed mode DRAM controller. V3-LS provides a
bridge between the PCI and the ISA bus. The PCI Local Bus architecture automatically provides
Plug-and-Play functionality for PCI peripheral devices.
Implemented in 0.6µm CMOS technology, this platform supports a full range of the Pentium
processor bus frequencies from 50- to 66-MHz. Synchronous between the CPU and the PCI bus
enables superior performance on 25- and 33-MHz PCI bus.
VESUVIUS makes best-of-class performance possible by virtue of its rich feature set, advanced
architecture, and incomparable power management. The VESUVIUS system solution offers the
highest level of power and thermal management for the Pentium processor systems, using
PicoPower's patented Power on Demand technology that includes active and passive power
management and heat regulation.
An innovative programming model simplifies the BIOS development task without compromising
any power management features. The power management control implemented in VESUVIUS
goes beyond the standard EnergyStar requirements. It offers an excellent time-to-market system
solution for Pentium processor-class portable systems. The VESUVIUS portable system solution
provides all the hooks required to support PCI and ISA hot and warm docking, enabling a full-
featured docking station design.
The V1-LS chip integrates the CPU bus to the PCI bus interface controller/arbiter, an L2 cache
controller. a DRAM controller and the power management controller. It takes full advantage of the
Pentium processor performance by supporting CPU bus frequencies up to 66-MHz. By
implementing both toggle and linear burst mechanism, the V1-LS is armed with the support for
Pentium-class processors from multiple vendors.
The integrated, 64-bit, direct-mapped L2 cache controller supports synchronous SRAM, external
TAG compare (for TAG RAMs) and both buffered write-through and write-back cache update
schemes for highest performance. The DRAM controller implements the logic required to use
advanced, high speed DRAMs that reduce the performance overhead of the L2 cache miss cycles.
The V1-LS has the control logic for write buffers in V2-LS to achieve 2-1-1-1 burst writes. It
implements a synchronous interface between the CPU and PCI buses to exploit the maximum
potential of PCI bandwidth. The V1-LS supports 64-bit, two-way-set associative write-back cache
with Sony's Sonyc-2WP.
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