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Table 2-11
ESS1688W Pin Descriptions (continued)
Pin name
Number
Digital Pins
FOUTL,R
30, 31
CINL,R
40, 41
VREF
42
CMR
43
AOUT L,R
46, 47
REFSEL
38
PCSPKO
50
FDXO
49
FDXI
48
I/O
O
Filter outputs left, right. A.C. coupled externally to CIN L,R in
order to remove DC offsets. These outputs have internal series
resistors of about 5K ohms. Capacitors to analog ground on
these pins can be used to create a lowpass filter pole that
removes switching noise introduced by the switched-capacitor
filters.
I
Capacitive coupled inputs left, right. These inputs have internal
pull-up resistors to CMR of approximately 50K ohms.
O
Reference generator resistor divider output. Should be
bypassed to analog ground with 0.1 uf capacitor.
O
Buffered reference output. Should be bypassed to analog
ground with a 47 uf electrolytic capacitor with a .1 uf capacitor
in parallel.
O
Line level stereo outputs, left, right.
I
Option input. Analog GND: normal operation Analog VDD:
reserved.
O
Analog output of PCSPKI with volume control.
O
Normally connected to CMR via an internal resistor. Can be
programmed to connect internal to FOUT R pin during DSP
serial mode.
I
Input with internal pull-up to CMR. Alternate input to left
channel filter stage in DSP serial mode.
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