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Table 2-2
V1-LS Pin Descriptions (continued)
Pin Name
Pin No.
CPU Interface (continued)
IGNNE#
39
INIT/WM_RST
31
INTR
7
INV
47
KEN#/INV
47
M_lO#
42
NA#
46
NMI
6
SMI#
30
SMIACT#
55
STPCLK#/
20
SUSP#
SUSP#
20
Type
O
IGNORE NUMERIC ERROR#: This pin indicates that a floating-
point error should be ignored.
O
INIT: The Pentium processor initialization input forces the Pentium
processor to begin execution in a known state. The INITNVM_RST
will typically be asserted when software reset commands are
written to either Port 64 or 92, or a shutdown cycle is detected.
WM_RST: Cyrix M1 processor initialization input forces the
processor to begin execution in a known state.
O
MASKABLE INTERRUPT: This pin indicates a maskable interrupt
request to the Pentium processor.
O
See KEN#.
O
CACHE ENABLE#: This output to the Pentium processor indicates
that the current cycle is cacheable. INV: This pin indicates a
request to invalidate the processor cache line. This output can also
be used as INV output during snoop cycles. If this function is not
used, CPU's INV pin should either be pulled high or connected to
W_R#.
I
MEMORY_INPUT & OUTPUT#: This cycle-definition signal is one
of the main pins that define the bus cycle. It distinguishes a
memory access from an l/O access. This signal is driven valid in
the same clock as ADS# and the cycle address. It remains valid
from the clock in which ADS# is asserted until the clock after
earlier of NA# or the last BRDY#.
O
NEXT ADDRESS#: NA# indicates to the Pentium processor that
V1 GS is ready to accept a new bus cycle.
O
NON-MASKABLE INTERRUPT: This pin indicates that an
external non-maskable interrupt has been generated.
O
SYSTEM MANAGEMENT INTERRUPT#: This output triggers a
system management interrupt and is used to invoke the SMM
(system management mode).
I
SYSTEM MANAGEMENT INTERRUPT ACTIVE#: This input from
the Pentium processor indicates that the CPU is operating In
SMM. Assertion of SMIACT# enables remapping of SMRAM to
physical DRAM at 000A0000-000BFFFF region.
O
STOP CLOCK#: This output indicates a stop clock request to
Intel's Pentium and AMD's K5 processor.
SUSP#: This output indicates a suspend request to Cyrix M1 CPU.
O
See STPCLK#.
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