Acer AcerNote 970 Service Manual page 153

Table 2-15 PCI0643 Signal Descriptions (continued)
Signal
DEVSEL# 93
TEST1# 61
DIOR# 57
DIOW# 58
DIRQ1 75
DIRQ2 86
DMARQ0 94
DMARQ1 60
DRST# 59
DSA2 70,
DSA1 69,
DSA0 68
Pin Type
S/T/S Device Select. When this signal is actively driven, it indicates
that the driving device has decoded its address as the target of
the current access.
whether any device on the bus has been selected.
I This pin is used with TEST0 when PCIMODE=0 to select
different DC tests for this chip.
T/O Primary Disk I/O Read. An active low output that enables the
data to be read from the drive . The duration and repetition
rate of the DIO# cycles is determined by the PCI0643
programming. DIOR# is driven high when inactive.
T/O Primary Disk I/O Write. This is an active low output that
enables data to be written to the drive.
repetition rate of DIOW# cycles is determined by PCI0643
programming. DIOW# is driven high when inactive.
I Disk Interrupt.
generates the IRQ14 output. DINT is asserted low, then high
by the drive at the beginning of a block transfer. This input
should have a external 1KΩ resistor and a 47pF capacitor pull
down connected to it.
I Disk Interrupt. Input for the secondary IDE port. It is used to
generate the IRQ15 output. DIRQ2 is asserted low then high
by the drive at the beginning of a block transfer. This input
should have a external 1KΩ resistor and a 47pF capacitor pull
down connected to it.
I DMA Request 0. This signal is used in a handshake manner
with DMACK0#, and should be asserted high by the primary
drive when it is ready to transfer data to or from the host.
I DMA Request 1. This signal is used in a handshake manner
with DMACK1#, and should be asserted high by the primary
drive when it is ready to transfer data to or from the host.
O Disk Reset. This is an active low output which signals the
IDE drive(s) to initialize its control registers. DRST# is a
buffered version of the RESET# input and connects directly to
the ATA connector.
O, Disk Address bits from 0 through 2. These are normally
B/T, outputs to the ATA connector for register selection in the
O drive(s).
C/BE[3:0] inputs. DSA[1] is also sampled as inputs on the
falling edge of RESET#. All of these pins have internal pull-up
resistors.
downs are required.
Description
As an input, it indicates to a master
This pin is an input to the PCI066 that
These signals are decoded from the A2 and
2.2KΩ resistors are recommended where pull-
The duration and