Smart Card - J7 - Aristocrat USA MAV500/MKVI Service Manual

Main Board
Pin No
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63

10.6.4 Smart Card - J7

The J7 connector provides an interface for an optional Smart Card Connection.
Pin No
1
2
3
4
5
6
10-28
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and it may not be copied. All rights reserved. © Copyright (ATI) Aristocrat Technologies, Inc. 2002
Table 10-11 PCI Mezzanine Connector - J6
Signal Name
TCK – Not connected
Ground
INTB# - NINTPMC
BUSMODE1# – Not
connected
INTD# - NINTPMC
Ground
PCICLK(2)
Ground
NREQ
V (I/O) – Not connected
AD[28] – PCIAD(28)
AD[25] – PCIAD(25)
Ground
AD[22] – PCIAD(22)
AD[19] – PCIAD(19)
V (I/O) – Not connected
NFRAME
Ground
NDEVSEL
Ground
SDONE# - Not
connected
PAR
V (I/O) – Not connected
AD[12] – PCIAD(12)
AD[09] – PCIAD(9)
Ground
AD[06] – PCIAD(6)
AD[04] – PCIAD(4)
V (I/O) – Not connected
AD[02] – PCIAD(2)
AD[00] – PCIAD(0)
Ground
Table 10-12 Smart Card Connector - J7
Pin Name
SCK2 Clock signal
Kout Transmitted data from microprocessor
Kin Received Data to microprocessor
Vcc_5 5 V Power Output
Vcc_3 3.3 V Power Output
Gnd DC return
USA MAV500/MKVI Service Manual
Pin No Signal Name
2 -12V – Not connected
4 INTA# - NINTPMC
6 INTC# - NINTPMC
8 +5V
10 PCI-RSVD – Not
connected
12 PCI-RSVD – Not
connected
14 Ground
16 NGNT
18 +5V
20 AD[31] – PCIAD(31)
22 AD[27] – PCIAD(27)
24 Ground
26 NCBE(3)
28 AD[21] – PCIAD(21)
30 +5V
32 AD[17] – PCIAD(17)
34 Ground
36 NIRDY
38 +5V
40 NLOCK
42 SBO# - Not connected
44 Ground
46 AD[15] – PCIAD(15)
48 AD[11] – PCIAD(11)
50 +5V
52 NCBE(0)
54 AD[05] – PCIAD(5)
56 Ground
58 AD[03] – PCIAD(3)
60 AD[01] – PCIAD(1)
62 +5V
64 REQ64# - Not connected
Description
28-00486-00