Processor 1/7 - EUROCOM M770CU Service Manual

Schematic Diagrams

Processor 1/7

Sheet 3 of 55
Processor 1/7
B - 4 Processor 1/7
PROCESSOR
2 2 D MI _ T X N 0
2 2 D MI _ T X N 1
2 2 D MI _ T X N 2
2 2 D MI _ T X N 3
2 2 D MI _ T X P 0
2 2 D MI _ T X P 1
2 2 D MI _ T X P 2
2 2 D MI _ T X P 3
2 2 D M I _ R XN 0
2 2 D M I _ R XN 1
2 2 D M I _ R XN 2
2 2 D M I _ R XN 3
2 2 D M I _ R XP 0
2 2 D M I _ R XP 1
2 2 D M I _ R XP 2
2 2 D M I _ R XP 3
2 2 F D I _ TX N 0
2 2 F D I _ TX N 1
2 2 F D I _ TX N 2
2 2 F D I _ TX N 3
2 2 F D I _ TX N 4
2 2 F D I _ TX N 5
2 2 F D I _ TX N 6
2 2 F D I _ TX N 7
2 2 F D I _ TX P 0
2 2 F D I _ TX P 1
2 2 F D I _ TX P 2
2 2 F D I _ TX P 3
2 2 F D I _ TX P 4
2 2 F D I _ TX P 5
2 2 F D I _ TX P 6
2 2 F D I _ TX P 7
It app lies to Aub urndal e and Clark sfiel d disc rete g raphi c desi gns.
2 2 F D I _ F S Y N C 0
If dis crete graph ic chi p is used f or Au burnda le, VA XG (G FX cor e) ra il can be co nnect ed
2 2 F D I _ F S Y N C 1
to GND if m otherb oard o nly s upport s dis crete graphi cs an d also in a commo n
mother board desig n if G FX VR is no t stu ffed. On the othe r hand , if the VR is st uffed ,
2 2 F D I _ I N T
VAXG c an be left floati ng in a com mon m otherb oard d esign (Gfx VR ke eps VA XG fro m
2 2 F D I _ L S Y N C 0
floati ng).
2 2 F D I _ L S Y N C 1
In add ition , FDI_ RXN_[7 :0] a nd FDI _RXP_ [7:0] can be left float ing o n the PCH.
FDI_TX [7:0] and F DI_TX# [7:0] can b e lef t floa ting o n the Aubur ndale .
The GF X_IMO N, FDI _FSYNC [0], FDI_FS YNC[1 ], FDI _LSYNC [0], FDI_LS YNC[1 ], and
FDI_IN T sig nals s hould be ti ed to GND ( throug h 1K ? % re sistor s) in the c ommon
mother board desig n case . Ple ase no t tha t if t hese s ignal s are left floati ng, th ere a re no
functi onal impact s but a sma ll amo unt o f powe r (~15 mW) maybe waste d. VAX G_SENS E
and VS SAXG_ SENSE on Aub urnda le can be l eft as no co nnect .
DPLL_R EF_SS CLK an d DPLL _REF_ SSCLK# can be con nected to G ND on Aubur ndale
direct ly if mothe rboard only suppo rts d iscret e grap hics. In a commo n moth erboar d
design , the se pin s are drive n via PCH ( even i f Grap hics is dis abled by BI OS) th us no
extern al te rminat ion is requ ired.
On Board DDR3 Thermal Sensor
PULL HIGH? ? ? IBEX? PAGE21
3. 3 V
C 5 8 1 R 1 42 * 10 m i l _s h o r t
C R I T _T E M P _ R E P # 2 5
*. 1 U _1 6 V _ 0 4
T H E R M _ A L E R T# 3 6
U 2 9 D 8 *R B 7 51 V
1 4 C A
V D D T H E R M P M _ E X T TS # _E C 4
2 6
D + A L E R T
B
Q4 4
2 N 3 9 0 4 3 7
D - S D A T A S M D _ C P U _ T H E R M 2 1 , 3 6
5 8
S M C _ C P U _ T H E R M 2 1 , 3 6
G N D S C L K
W 8 3L 7 7 1 A W G
1/7 ( DMI,PEG,FDI )
U 2 8A
20 mil
B 2 6 P E G_ I R C O MP _R R 4 0 8 4 9 . 9_ 1 % _ 0 4
P E G _ I C O MP I
A 2 6
P E G_ I C OM P O
A 2 4 B 2 7
D MI _ R X# [ 0 ] P E G _ R C OM P O
C 2 3 A 2 5 E XP _R B I A S R 4 1 0 7 5 0_ 1 % _ 0 4
D MI _ R X# [ 1 ] P E G _ R B I A S
B 2 2
D MI _ R X# [ 2 ]
A 2 1 K 3 5
P E G _ R X # 0 1 3
D MI _ R X# [ 3 ] P E G _ R X # [ 0 ] J 3 4
P E G _ R X # 1 1 3
P E G _ R X # [ 1 ]
B 2 4 J 3 3
D MI _ R X[ 0 ] P E G _ R X # [ 2 ] P E G _ R X # 2 1 3
D 2 3 G 35
P E G _ R X # 3 1 3
B 2 3 D MI _ R X[ 1 ] P E G _ R X # [ 3 ] G 32
P E G _ R X # 4 1 3
D MI _ R X[ 2 ] P E G _ R X # [ 4 ]
A 2 2 F 3 4
D MI _ R X[ 3 ] P E G _ R X # [ 5 ] P E G _ R X # 5 1 3
F 3 1
P E G _ R X # 6 1 3
P E G _ R X # [ 6 ]
D 2 4 D 35
D MI _ T X #[ 0] P E G _ R X # [ 7 ] P E G _ R X # 7 1 3
G 2 4 E 3 3
D MI _ T X #[ 1] P E G _ R X # [ 8 ]
F 2 3 C 33
D MI _ T X #[ 2] P E G _ R X # [ 9 ]
H 2 3 D 32
D MI _ T X #[ 3] P E G _ R X # [ 1 0 ]
B 3 2
P E G _ R X # [ 1 1 ]
D 2 5 C 31
D MI _ T X [ 0 ] P E G _ R X # [ 1 2 ]
F 2 4 B 2 8
D MI _ T X [ 1 ] P E G _ R X # [ 1 3 ]
E 2 3 B 3 0
G 2 3 D MI _ T X [ 2 ] P E G _ R X # [ 1 4 ] A 3 1
D MI _ T X [ 3 ] P E G _ R X # [ 1 5 ]
J 3 5
P E G _ R X 0 1 3
P E G _R X [ 0 ] H 34
P E G _ R X 1 1 3
P E G _R X [ 1 ]
H 33
P E G _R X [ 2 ] P E G _ R X 2 1 3
E 2 2 F 3 5
P E G _ R X 3 1 3
F D I _ TX # [ 0 ] P E G _R X [ 3 ]
D 2 1 G 33
P E G _ R X 4 1 3
F D I _ TX # [ 1 ] P E G _R X [ 4 ]
D 1 9 E 3 4
F D I _ TX # [ 2 ] P E G _R X [ 5 ] P E G _ R X 5 1 3
D 1 8 F 3 2
P E G _ R X 6 1 3
F D I _ TX # [ 3 ] P E G _R X [ 6 ]
G 2 1 D 34
P E G _ R X 7 1 3
F D I _ TX # [ 4 ] P E G _R X [ 7 ]
E 1 9 F 3 3
F D I _ TX # [ 5 ] P E G _R X [ 8 ]
F 2 1 B 3 3
F D I _ TX # [ 6 ] P E G _R X [ 9 ]
G 1 8 D 31
F D I _ TX # [ 7 ] P E G _ R X [ 1 0 ]
A 3 2
P E G _ R X [ 1 1 ]
C 30
P E G _ R X [ 1 2 ]
D 2 2 A 2 8
F D I _ TX [ 0 ] P E G _ R X [ 1 3 ]
C 2 1 B 2 9
F D I _ TX [ 1 ] P E G _ R X [ 1 4 ]
D 2 0 A 3 0
F D I _ TX [ 2 ] P E G _ R X [ 1 5 ]
C 1 8
F D I _ TX [ 3 ]
G 2 2 L 3 3 P E G_ T X #_ 0 C 1 14 * . 1 U _ 1 0 V _ X 7 R _ 0 4 _+ U
F D I _ TX [ 4 ] P E G_ T X # [ 0 ]
E 2 0 M 35 P E G_ T X #_ 1 C 5 27 * . 1 U _ 1 0 V _ X 7 R _ 0 4 _+ U
F D I _ TX [ 5 ] P E G_ T X # [ 1 ]
F 2 0 M 33 P E G_ T X #_ 2 C 5 33 * . 1 U _ 1 0 V _ X 7 R _ 0 4 _+ U
F D I _ TX [ 6 ] P E G_ T X # [ 2 ]
P E G_ T X #_ 3
G 1 9 M 30 C 1 44 * . 1 U _ 1 0 V _ X 7 R _ 0 4 _+ U
F D I _ TX [ 7 ] P E G_ T X # [ 3 ]
L 3 1 P E G_ T X #_ 4 C 5 18 * . 1 U _ 1 0 V _ X 7 R _ 0 4 _+ U
P E G_ T X # [ 4 ]
F 1 7 K 3 2 P E G_ T X #_ 5 C 1 07 * . 1 U _ 1 0 V _ X 7 R _ 0 4 _+ U
F D I _ F S Y N C [ 0 ] P E G_ T X # [ 5 ] P E G_ T X #_ 6
E 1 7 M 29 C 5 30 * . 1 U _ 1 0 V _ X 7 R _ 0 4 _+ U
F D I _ F S Y N C [ 1 ] P E G_ T X # [ 6 ]
J 3 1 P E G_ T X #_ 7 C 1 19 * . 1 U _ 1 0 V _ X 7 R _ 0 4 _+ U
P E G_ T X # [ 7 ]
C 1 7 K 2 9
F D I _ I N T P E G_ T X # [ 8 ]
H 30
P E G_ T X # [ 9 ]
F 1 8 H 29
F D I _ LS Y N C [ 0 ] P E G _T X # [ 1 0 ]
D 1 7 F 2 9
F D I _ LS Y N C [ 1 ] P E G _T X # [ 1 1 ]
E 2 8
P E G _T X # [ 1 2 ]
D 29
P E G _T X # [ 1 3 ]
D 27
P E G _T X # [ 1 4 ]
C 26
P E G _T X # [ 1 5 ]
L 3 4 P E G_ T X _0 C 1 18 * . 1 U _ 1 0 V _ X 7 R _ 0 4 _+ U
P E G_ T X [ 0 ]
M 34 P E G_ T X _1 C 5 20 * . 1 U _ 1 0 V _ X 7 R _ 0 4 _+ U
P E G_ T X [ 1 ]
M 32 P E G_ T X _2 C 5 32 * . 1 U _ 1 0 V _ X 7 R _ 0 4 _+ U
P E G_ T X [ 2 ]
L 3 0 P E G_ T X _3 C 1 41 * . 1 U _ 1 0 V _ X 7 R _ 0 4 _+ U
P E G_ T X [ 3 ]
M 31 P E G_ T X _4 C 5 19 * . 1 U _ 1 0 V _ X 7 R _ 0 4 _+ U
P E G_ T X [ 4 ]
K 3 1 P E G_ T X _5 C 1 05 * . 1 U _ 1 0 V _ X 7 R _ 0 4 _+ U
P E G_ T X [ 5 ] P E G_ T X _6
M 28 C 5 29 * . 1 U _ 1 0 V _ X 7 R _ 0 4 _+ U
P E G_ T X [ 6 ]
H 31 P E G_ T X _7 C 1 39 * . 1 U _ 1 0 V _ X 7 R _ 0 4 _+ U
P E G_ T X [ 7 ]
K 2 8
P E G_ T X [ 8 ]
G 30
P E G_ T X [ 9 ]
G 29
P E G_ T X [ 1 0 ]
F 2 8
P E G_ T X [ 1 1 ]
E 2 7
P E G_ T X [ 1 2 ]
D 28
P E G_ T X [ 1 3 ]
C 27
P E G_ T X [ 1 4 ]
C 25
P E G_ T X [ 1 5 ]
G 9 89 P I N U P GA
Analog Thermal Sensor
3 . 3 V
Q6 8
2 1 1 :2 ( 4mi ls :8 mi ls)
V C C OU T T H E R M_ V O L T 3 6
4, 1 2 , 1 3 , 2 0 , 21 , 2 2 , 2 4 , 2 5 , 27 , 2 9 , 3 0 , 3 1, 32 , 3 3 , 3 4 , 3 7, 3 9 , 4 0 , 4 1
C 5 8 9 3 C 59 3
G N D
. 1U _ 1 6V _0 4 G 7 1 1S T9 U . 1 U _1 6 V _ 0 4
1
3
2
PLACE NEAR U29
P E G _ TX # 0 1 3
P E G _ TX # 1 1 3
P E G _ TX # 2 1 3
P E G _ TX # 3 1 3
P E G _ TX # 4 1 3
P E G _ TX # 5 1 3
P E G _ TX # 6 1 3
P E G _ TX # 7 1 3
P E G _ TX 0 1 3
P E G _ TX 1 1 3
P E G _ TX 2 1 3
P E G _ TX 3 1 3
P E G _ TX 4 1 3
P E G _ TX 5 1 3
P E G _ TX 6 1 3
P E G _ TX 7 1 3
3 . 3 V
2 0 , 3 3, 36 , 3 7 , 3 8 , 4 5 V D D 3