M92 S2 Main Generic - EUROCOM M770CU Service Manual

M92 S2 Main Generic

PIN STRA PS
VGA _3 . 3V S
PC I E F U LL T X OU T PU T SW I N G
GP I O 0
R 56 5 *1 0K _0 4_ +U
PC I E TR A N S MI TTE R D E - EMP H A S I S E N A BL ED
R 57 2 *1 0K _0 4_ +U GP I O 1
P CIE GEN2 ENA BL E D
R 56 6 *1 0K _0 4 GP I O 2
GP I O 8
R 57 4 *1 0K _0 4
VGA E N AB L ED
R 57 5 *1 0K _0 4 GP I O 9
S ERIAL ROM T YPE OR MEMORY AP ERTURE SIZ E SE L ECT
R 57 6 *1 0K _0 4_ +U GP I O 1 1
R 56 7 *1 0K _0 4 GP I O 1 2
R 56 9 *1 0K _0 4 GP I O 1 3
A UD[1 ] AUD[0 ]
0 0 No a u d i o fu n cti o n
0 1 Au d i o fo r Di sp l a yPo rt a n d HDMI i f d o n gl e i s d e te c t e d
1 0 Au d i o fo r Di sp l a yPo rt o n l y
1 1 Au d i o fo r b o th Di sp l a yPo rt a n d HDMI
R 58 2 *1 0K _0 4_ +U V _V SY
V _H S Y
R 58 3 *1 0K _0 4_ +U
R 58 4 *1 0K _0 4 GE N ER I C C
I GN OR E V I P D E V I C E S TR A P S
R 58 5 *1 0K _0 4 V SY N C _ D AC 2
R 57 1 *1 0K _0 4 H S Y N C _D A C 2
E NABL E EX T ERNAL BIOS ROM
R 58 6 *1 0K _0 4 GP I O 2 2
R 58 7 *1 0K _0 4_ +U GP I O 5
V GA _3 . 3 V S
R 59 2 *1 0K _0 4_ +U GPI O_ 23 _C LK R E QB
R 59 3 *1 0K _0 4_ +U GP I O7_B L ON
G PIO _7 _B LO N ( Co nt rol s Ba ck lig ht O n/O ff )
A cti ve h ig h.
E xte rn al 1 0-k O pu ll- do wn r eco mm en ded .
R 5 99
* 10K _ 04_ +U
M9 2_3 . 3V S
1 9, 3 6 C T Fb
PQ5 5
G PIO _2 1_ BB _EN (B ac k B ia s (B B) co nt rol ) *MTN 7 00 2Z H S 3_ +U
W hen G PI O_ 21_ BB _E N = 0 V , the n ba ck bi as i s d is ab led
R 6 04
o n t he P CB (i .e . BPP = V DD C).
* 10K _ 04_ +U
W hen G PI O_ 21_ BB _E N = 3 .3 V , t he n bac k bi as is en abl ed
o n t he P CB (i .e . BPP = V DD C + O ff set ).
C an fu nc ti on as a GP IO i f not r eq uir ed f or BB c on tro l.
V GA _3 . 3V S
J TAG _T RS TB (Ta p Co ntr ol le r ASY NC R ese t)
T RST b (T ap Co nt ro lle r AS YN C R es et )
W hen T ES TE N = 0 V , t he n in put i s a ' do n' t car e?
V GA_ 3. 3 VS
J TAG m od e: Pu ll ed hi gh ( in act iv e) to 3 .3 V .
G ENE RI CA (S ter eo d isp la y sy nc si gn al)
U nco nn ec te d i f no t u se d.
C an al so b e u se d as re fe re nce c lo ck in pu t
f or ex te rn al sp re ad
s pec tr um f or TM DS /LV DS .
1. 8 V_ R EG
L 67
1 . 8V _R E G * H C B1 00 5K F-1 21 T2 0_0 4_ +U
.
1 . 1V _1 . 0 V _P WR
(1 .8 V@1 2 0 m A DPLL_ PV DD)
(1 .1 V @3 0 0 m A DPLL_ VDD C)
2 1
S 4 S1
D PL L_ PV S S
1. 8V _ R EG
(1 .8 V @2 0 m A TSVDD)
U 37 B
M 93 -S 3 / M 92 -S 2 AF 2
TX C AP _D PA 3P
A E 9 AF 4
D V C N T L_0 / D VP D A TA _1 8 T XC A M_D P A 3N
L 9
D V C N T L_1 / N C
R 5 77 *0_ 04_ +U N 9 AG3
16 TE S T_ EN D V C N T L_2 / N C TX 0P _D PA 2P
A E 8 DPA AG5
D V D A TA _1 2 / D V PD A T A_ 16 T X0 M_D P A 2N
R 5 73 *0_ 04 AD 9
V GA _3 . 3V S D V D A TA _1 1 / D V PD A T A_ 20
A C 1 0 AH 3
D V D A TA _1 0 / D V PD A T A_ 22 TX 1P _D PA 1P
AD 7 AH 1
D V D A TA _9 / D V P D A TA _1 2 T X1 M_D P A 1N
AC 8
D V D A TA _8 / D V P D A TA _1 4
AC 7 AK 3
D V D A TA _7 / D V P C N TL _0 TX 2P _D PA 0P
A B 9 AK 1
A B 8 D V D A TA _6 / D V P D A TA _8 T X2 M_D P A 0N
D V D A TA _5 / D V P D A TA _6
A B 7 AK 5
D V D A TA _4 D VP D A TA _ 4 TX C BP _D PB 3P
A B 4 AM3
D V D A TA _3 / D V P D A TA _1 9 T XC B M_D P B 3N
R 5 78 *0_ 04 A B 2
D V D A TA _2 / D V P D A TA _2 1
Y 8 AK 6
D V D A TA _1 / D V P D A TA _2 TX 3P _D PB 2P
DV PD AT A[2 3: 20 ]. Y 7 AM5
D V D A TA _0 / D V P D A TA _0 T X3 M_D P B 2N
Vi de o Mem or y ID DP B
AJ 7
Se t DV P a s 1. 8- V ( VD DR 4/5 ) ge ne ral I /O .
D VO TX 4P _D PB 1P AH 6
T X4 M_D P B 1N
VR AM ID ( DE FA ULT 0 ,0 )
AK 8
Q-D IE E -D IE
TX 5P _D PB 0P
AL 7
R5 73 0 1 T X5 M_D P B 0N
R5 78 0 0
M 93 -S 3 / M 92 -S 2
Sa ms ung D DR 2 64X 16 5 00M hz
W 6
D P C _ PV D D / D VP D A TA _1 1
6- 04 -41 16 4- e3 0 2 1 V 6 M 92 -S 2 / M 93 - S 3
D P C _ PV S S / GN D
S 1 S 1 V4
D V P D AT A_ 3/ T XC C P _D P C 3P
AC 6 U 5
D P C _ VD D 1 8# 1/ D V PD A T 10 D V P C N TL _2 / TXC C M_ D P C 3N
AC 5
D P C _ VD D 1 8# 2/ D V PD A T 23
W3 Th e si gna ls a bov e ca n be le ft un co nn ec ted i f not u se d.
A A 5 D V PD A T A_ 7 / TX 0P _D P C 2P V2
D P C _ VD D 1 0# 1/ D V PD A T 15 D V P D A TA _1 / T X0M_ D P C 2N
A A 6
D P C _ VD D 1 0# 2/ D V PD A T 17
Y 4
D V P C N TL _MV 1 / TX 1P _D P C 1P
W5
D V P D A TA _9 / T X1M_ D P C 1N
U 1 AA 3
D P C _ VS S R #1 / D V P C LK D V P D A TA _1 3 / TX 2P _D P C 0P
W 1 Y 2
D P C _ VS S R #2 / D V P D AT 5 D V P C N TL _1 / T X2M_ D P C 0N
U 3
Y 6 D P C _ VS S R #3 / GN D AA 12 R 588 *15 0_ 04
D P C _ VS S R #4 / GN D V D D R 4 / D PC D _ C A LR
A A 1
D P C _ VS S R #5 / D V P C N TL _MV 0
For M93-S3: Use 150 Ohms Pull Down
For M92-S2: Use 0R to VDDR4
DPC
R 590 *0_ 04 _+ U
SC L R 1
12 S C L S C L
SD A R 3 I 2C
12 S D A S D A
AM2 6 V GA _R
R
GE NE RAL P UR PO SE I/ O AK 26
GPI O0 R B
U 6
GPI O1 GP I O_0 V GA _G
U 1 0 AL 25
GP I O_1 G
GPI O2
T1 0 GP I O_2 GB AJ 25
V GA_ S MBD A TA U 8
GP I O_3 _S MB D A TA
V GA_ S MBC L K U 7 AH 2 4 V GA _B
GP I O_4 _S MB C LK B
GPI O5 T 9 AG2 5
GP I O_5 _A C _B A TT BB
T 8 DAC 1 Re qu ir es an o n boa rd T TL bu ff er (e .g . LS 125 ).
GP I O_6
GPI O7 _B LON T 7 AH 2 6 V _ H SY
GPI O8 P 1 0 GP I O_7 _B LON H S Y N C AJ 27 V _ VS Y
GPI O9 GP I O_8 _R OMS O VS Y N C
P 4
GP I O_9 _R OMS I
GPI O1 0 P 2 Re qu ir es an o n boa rd T TL bu ff er (e .g . LS 125 ).
GP I O_1 0_ R OMS C K
GPIO20 / GPI O15 FOR GPI O1 1 N 6 AD 2 2 R 5 98
GP I O_1 1 R S E T
GPI O1 2 N 5 A VD D
VDDC CORE? ? ? ? GP I O_1 2
GPI O1 3 N 3 AG2 4
R 600
Y 9 GP I O_1 3 AV D D AE 22
*0 _04
GP I O_1 4_ H PD 2 A V SS Q
N 1 V D D 1D I
44 M92 _GP I O15
M 4 GP I O_1 5_ PW R C N T L_0 AE 23 R SE T (DA C1 R ef ere nc e Res is to r)
GP I O_1 6_ SS I N V D D 1D I
R 6 AD 2 3 T o se t t he f ul l s ca le DA C cu rr ent
19 Th ermI N T GP I O_1 7_ TH E R MA L_ I N T VS S 1D I
W 1 0
GP I O_1 8_ H PD 3 t hr ou gh a hi gh pr ec is ion
G M 2 M 9 2 -S2 /M 9 3 -S3
GP I O_1 9_ C TF r es is tor ( 1% ) of 49 9 O p la ce d bet we en
P 8 AM1 2
44 M92 _GP I O20 GP I O_2 0_ PW R C N T L_1 R 2 / N C
GP I O_21 _B B EN P 7 AK 12 t hi s pin a nd A VSS Q.
GPI O2 2 N 8 GP I O_2 1_ BB _ EN R 2 B / N C
GP I O_2 2_ R OMC S B
GP I O_23 _C L KR E QB N 7 AL 11
GP I O_2 3_ C LK R E QB G2 / N C AJ 11
G2 B / N C
GP IO_ 23 _C LK REQ B Re ser ve d. U nco nn ec te d i f DA C2 is n ot us ed ;
R 60 5 *1 0K _0 4 AK 10
B 2 / N C
GPI O2 4_ TR S TB
35M IL L 6 AL 9
JT AG D E B U G 35M IL GPI O2 5_ TD I L 5 J TA G_T R S TB B2 B / N C
J TA G_T D I
35M IL GPI O2 6_ TC K L 3
POR T
35M IL GPI O2 7_ TMS L 1 J TA G_T C K AH 1 2
J TA G_T MS C / N C
35M IL GPI O2 8_ TD O K 4 DAC 2 AM1 0 DA C2 ( TV ) I nt er fac e
J TA G_T D O Y / N C
R 60 7 *1 0K _0 4 AF 2 4 AJ 9
T E ST EN C OMP / N C
R 60 8 *1 0K _0 4_+ U AB 1 3
GE N E R I C A
H SY N C _ D AC 2
W 8 AL 13
GEN E R I C C W 9 GE N E R I C B H 2S Y N C AJ 13 V S Y N C _D A C 2
16 TE S T_ EN GE N E R I C C V 2S Y N C
W 7
GE N E R I C D
A D 1 0 V D D 1D I
GE N E R I C E_ H P D 4
AD 1 9
V D D 2 D I / N C
A C 1 4 AC 1 9
46 H P D _1
H P D 1 V SS 2 D I / N C
R 60 9 *4 99_ 04 _+ U
A2 VD D / N C AE 20 R 5 96
PL ACE VREF G
R 61 0 C 7 12 AE 17
A2 VD D Q / N C
DIV IDE R AND C AP A C 1 6
V R E F G
C LOSE TO ASIC *2 49_ 04 _+ U *. 1 U _16 V _04 _+ U AE 19
A2 V SS Q
AG1 3 R 6 11
R 2 SE T / N C
R 6 13
DD C/ AU X R 6 14
D P LL _P V D D AE 6
D D C 1C LK
L 68 * H C B1 00 5K F - 1 21 T2 0_ 04_ +U P LL /C LO CK AE 5
. D D C 1D A TA
AF 1 4
D P L L_P V D D
AE 1 4 AD 2 DD C1 AN D AUX 1 CA N BE JO IN TED
D P L L_P V S S A U X1P
D P LL _V D D C AD 4 TO GET HE R FOR D UA L DCC /A UX
A U X 1N
D PL L_ PV S S FU NCT IO N
A D 1 4 AC 1 1
D P L L_V D D C D D C 2C LK RE FER T HE DA TA BO OK FO R DE TAI L
AC 1 3 Th ese s ig nal s mu st be p ul led
D D C 2D A TA
hi gh (t o 3.3 V o r 5 V ) be for e
XT AL I N A M2 8 AD 1 3 VD DC is p owe re d up .
X TA LI N A U X2P
XT AL OU T AK 2 8 AD 1 1
X TA LOU T A U X 2N
2 1 AE 16
S 5 S 1 D D C C L K_ A U X5P AD 1 6
D D C D A TA _A U X 5N
D P LL _P V S S
AC 1
D D C 6C LK
T 4 AC 3
19 GPU _ D PL U S T 2 D P L U S T HE RMA L D D C 6D A TA
19 GPU _ D MI N U S D MI N U S
AD 2 0
D D C C L K_ A U X3P AC 2 0 If D DC ( I2C m as ter ) fu nc tio na li ty is n ot us ed
D D C D A TA _A U X 3N
R 5
th es e pi ns
TS V D D A D 1 7 T S _F D O AB 22
ca n be a sso ci at ed wi th a not he r DDC i nt er fac e
T S VD D N C # 1
A C 1 7 AC 2 2
T S VS S N C # 2 su ch a s an
L 69 * H C B1 00 5K F - 1 21 T2 0_ 04_ +U
. LC D or a se co nd (e xt er na l) TM DS in te rf ac e. Ca n
TS VS S be u se d
to s up po rt in te rna l Hi gh -ba nd wi dth D ig it al
Co nt en t
M92 -S2 Pr ot ec ti on (H DC P) fu nc ti ona li ty .
2 1
S6 S 1
T SV S S
HDMI
T MD S_ C LOC K 46
T MD S_ C LOC K # 4 6
T MD S_ D A TA 0 46
T MD S_ D A TA 0# 4 6
T MD S_ D A TA 1 46
T MD S_ D A TA 1# 4 6
T MD S_ D A TA 2 46
T MD S_ D A TA 2# 4 6
L63
*H C B 100 5K F -121 T2 0_ 04_ +U (1 . 8 V@ 4 5 mA V DD1 DI)
1. 8V _ R EG .
L62
*H C B 100 5K F -121 T2 0_ 04_ +U (1 .8 V@7 0 m A AVDD)
. AV D D
L91
*H C B 100 5K F -121 T2 0_ 04_ +U
. A 2V D D Q
AV S SQ
S 2
S 1
A V SS Q2
V D D R 4
Th e R and R B, G an d GB , B a nd BB
pa ir s sho ul d be ro ut ed as
di ff er ent ia l sig na ls u p t o th e
VGA _ R
V GA _R 1 2
te rm in ati on c los e to t he vi de o
co nn ec tor . VGA _ G
V GA _G 1 2
VGA _ B
V GA _B 1 2
Dr iv e a 3 7. 5- O e qu iv al ent l oa d
(3 7. 5 O = 7 5- O p ul l- do wn
V _H S Y 12 re si st or to V SS on b oa rd in
V _V S Y 12
pa ra ll el wi th th e 75 -O CR T
lo ad /i mpe da nc e):
* 499 _0 4_ +U
A V SS Q
Fo r R/G /B :
On e 75- O pu ll- do wn r esi st or
cl os e t o th e c on ne ct or be fo re
th e fil te r.
Or
Tw o 150 -O p ull -d ow n res is to rs;
on e clo se t o t he o ut put p in s o n
th e GPU a nd an ot he r clo se t o t he
co nn ect or b efo re t he fi lt er .
Fo r RB/ GB /B B:
X TA LI N
Gr ou nde d ri ght a wa y. MU ST N OT be
co nn ect ed t o A VS SQ .
R 6 06 * 1M_ 04_ +U X TA LOU T
R2 SE T(D AC 2 Ref er en ce Re si st or) X8
1 2
To s et th e ful l sc al e D AC c urr en t thr ou gh a
hi gh pr ec is ion
*2 7MH Z _+ U
re si sto r (1 %) of 7 15 O (p re lim in ar y v al ue )
M9 2_3 . 3V S C 7 10 C 71 1
pl ac ed be tw een t hi s
*0_ 04_ +U
A 2V D D Q pi n and A 2V SSQ . *1 8P _5 0V _0 4_ +U *1 8P _5 0V _0 4_+ U
MU ST BE c on nec te d ev en if n ot us ed .
2 1
S3 S 1
*71 5_1 %_ 04_ +U A VS S Q2
*4. 7 K_ 04 _+U
3 . 3 V S
*4. 7 K_ 04 _+U
I 2 C B _S C L 46
I 2 C B _S D A 4 6
V GA _D D C C LK 12
V GA _D D C D A TA 12
V D D R 4 16
M92 _3 . 3V S 1 3, 16
V D D 3 20, 3 3, 36 , 37 , 3 8, 4 5
1. 8 V_ R E G 1 5, 1 6, 19
V GA_ 3. 3 VS 13 , 19
3. 3 VS 2, 10 , 11, 1 2, 13 , 20 , 2 1, 2 2, 23 , 24 , 2 5, 2 6, 27 , 29 , 3 0, 3 1, 32 , 33, 3 5, 36 , 37 , 42, 4 3, 44 , 46
1. 1 V_ 1. 0 V_ P WR 13 , 15, 1 6, 19
Schematic Diagrams
V D D 1D I
Sheet 14 of 55
M92 S2 Main
Generic
M92 S2 Main Generic B - 15