EUROCOM M770CU Service Manual page 86

Schematic Diagrams
IBEXPEAK - M 2/9
Sheet 21 of 55
IBEXPEAK - M 2/9
B - 22 IBEXPEAK - M 2/9
IBEXPEAK - M (PCI-E,SMBUS,CLK)
U 3 0 B
B G3 0
P E R N 1
B J 3 0
P E R P 1
B F 2 9
P E T N 1
B H 2 9
P E T P 1
A W 3 0
29 P C I E _ R X N 2_ N E W _C A R D P E R N 2
B A 3 0
29 P C I E _ R X P 2 _ N E W _ C A R D P E R P 2
P C I E _ T X N 2 _C
C 4 0 3 . 1 U _ 1 0 V _ X7 R _ 0 4 B C 3 0
2 9 P C I E _ T X N 2_ N E W _C A R D P E T N 2
P C I E _ T X P 2 _ C
C 4 0 8 . 1 U _ 1 0 V _ X7 R _ 0 4 B D 3 0
2 9 P C I E _ T X P 2 _ N E W _ C A R D P E T P 2
A U 3 0
2 9 P C I E _ R X N 3 _ W L A N P E R N 3
A T 3 0
2 9 P C I E _ R X P 3 _ W L A N C 6 2 0 . 1 U _ 1 0 V _ X7 R _ 0 4 P C I E _ T X N 3 _C A U 3 2 P E R P 3
2 9 P C I E _ T X N 3 _ W L A N
P E T N 3
C 6 2 3 . 1 U _ 1 0 V _ X7 R _ 0 4 P C I E _ T X P 3 _ C A V 3 2
2 9 P C I E _ T X P 3 _ W L A N P E T P 3
B A 3 2
3 2 P C I E _ R X N 4 _G L A N P E R N 4
B B 3 2
3 2 P C I E _ R X P 4 _ G L A N
P E R P 4
C 4 1 4 . 1 U _ 1 0 V _ X7 R _ 0 4 P C I E _ T X N 4 _C B D 3 2
3 2 P C I E _T X N 4 _G L A N P C I E _ T X P 4 _ C P E T N 4
C 4 1 9 . 1 U _ 1 0 V _ X7 R _ 0 4 B E 3 2
3 2 P C I E _T X P 4 _ G L A N P E T P 4
B F 3 3
P E R N 5
B H 3 3
P E R P 5
B G3 2
P E T N 5
B J 3 2
P E T P 5
PCI-E x1 Usage B A 3 4
P E R N 6
A W 3 4
B C 3 4 P E R P 6
P E T N 6
Lane 1 WLAN B D 3 4
P E T P 6
Lane 2 NEW CARD
A T 3 4
P E R N 7
A U 3 4
Lane 3 3G P E R P 7
A U 3 6
P E T N 7
Lane 4 GLAN A V 3 6
P E T P 7
Lane 5 CARD READER
B G3 4
P E R N 8
B J 3 4
Lane 6 X
P E R P 8
B G3 6
P E T N 8
Lane 7 X B J 3 6
P E T P 8
Lane 8 X
A K 4 8
3 . 3 V C L K O U T _ P C I E 0 N
A K 4 7
C L K O U T _ P C I E 0 P
R 2 4 2 1 0 K _ 0 4 P 9
P C I E C L K R Q0 # / GP I O 7 3
A M4 3
C L K O U T _ P C I E 1 N
3 . 3 V S A M4 5
C L K O U T _ P C I E 1 P
R 1 9 0 1 0 K _ 0 4 U 4
P C I E C L K R Q1 # / GP I O 1 8
A M4 7
29 C L K _ P C I E _ N E W _ C A R D # C L K O U T _ P C I E 2 N
A M4 8
2 9 C L K _ P C I E _ N E W _ C A R D C L K O U T _ P C I E 2 P
R 4 6 9 0 _ 0 4 C L K _ S L O T 2 _O E # N 4
2 9 N E W C A R D _ C LK R E Q#
P C I E C L K R Q2 # / GP I O 2 0
A H 4 2
2 9 C L K _ P C I E _ MI N I #
C L K O U T _ P C I E 3 N
A H 4 1
2 9 C LK _ P C I E _ MI N I
C L K O U T _ P C I E 3 P
A 8
2 9 W L A N _ C LK R E Q# P C I E C L K R Q3 # / GP I O 2 5
A M5 1
3 2 C L K _ P C I E _ GL A N # C L K O U T _ P C I E 4 N
3 2 C L K _ P C I E _ GL A N A M5 3
C L K O U T _ P C I E 4 P
LA N _ C L K R E Q# M 9
P C I E C L K R Q4 # / GP I O 2 6
A J 5 0
C L K O U T _ P C I E 5 N
3 . 3 V
A J 5 2
C L K O U T _ P C I E 5 P
R 1 8 7 1 0 K _ 0 4
H 6
P C I E C L K R Q5 # / GP I O 4 4
A K 5 3
C L K O U T _ P E G _ B _ N
3 . 3 V A K 5 1
C L K O U T _ P E G _ B _ P
R 1 8 9 1 0 K _ 0 4 P 1 3
P E G_ B _C L K R Q# / G P I O 5 6
I be x P e a k -M _ R e v 0 _ 9
P C H _ B T _ E N #
B 9
P C H _ B T _ E N # 3 3
S M B A L E R T # / G P I O 11
H 1 4 S M B _ C L K
S MB C L K S MB _ C L K 2 , 1 0 , 1 1
C 8 S M B _ D A T A
S MB _ D A T A 2 , 1 0 , 1 1
S M B D A T A
P C H _ U P E K _ I N I T #
J 14
S ML 0 A L E R T # / G P I O 60
C 6 S M L0 _ C L K
S ML 0 _ C LK 2 9
S M L 0 C L K
S M L0 _ D A T A
G8
S ML 0 _ D A T A 2 9
S M L0 D A T A
M1 4 L P D _ S P I _ I N T R #
S ML 1 A L E R T # / G P I O 74
E 1 0 S M L1 _ C L K
S M C _ C P U _ T H E R M 3 , 3 6
S ML 1 C LK / G P I O 58
S M L1 _ D A T A
G1 2
S M L 1 D A TA / G P I O 75 S M D _ C P U _ T H E R M 3 , 3 6
T 13 C L _ C LK 1
C L _ C L K 1
T 11 C L _ D A T A 1
C L _D A T A 1
T 9 C L _ R S T # 1
C L _ R S T 1#
10K pull -down t o
GND
P E G _ C L K R E Q #
H 1 1 00-MHz Gen2 di fferent ial cloc k to PC Ie Grap hics
P E G _ A _ C L K R Q # / G P I O 47 d evice.
A D 43
V GA _ P E X C L K # 1 3
C LK OU T _ P E G _ A _ N
A D 45
V GA _ P E X C L K 13
C L K O U T _ P E G _ A _ P
A N 4
C L K OU T _D M I _ N C L K _E XP _ N 4
A N 2
C L K _E XP _ P 4
C L K OU T _ D M I _ P
A T 1 P C H _ C LK _ D P _ N _ R 1 4 R N 2 9
C L K OU T _ D P _N / C L K O U T _ B C L K 1 _ N C L K _D P _ N 4
P C H _ C LK _ D P _ P _ R
A T 3 2 3 4 P 2 R X 0_ 0 4 _ -U
C L K OU T _D P _ P / C L K O U T_ B C L K 1 _ P C L K _D P _ P 4
A W 2 4 1 00-MHz differe ntial c lock fro m PCH t o Proce ssor.
C L K I N _D M I _ N C L K _ P C I E _ I C H # 2
C onnect to PEG_ CLK#/PE G_CLK pi ns of t he
B A 2 4
C L K _ P C I E _ I C H 2
C L K I N _ D M I _ P p rocesso
A P 3
C L K _ B U F _ B C L K _ N 2
C L K I N _ B C L K _ N
A P 1
C L K _ B U F _ B C L K _ P 2
C LK I N _ B C L K _ P
F 1 8 C L K _ B U F _ D O T 9 6 _N 2
C L K I N _ D OT _ 9 6 N
E 1 8
C L K _ B U F _ D O T 9 6 _P 2
C L K I N _ D O T_ 9 6 P
A H 13
C L K _ S A T A # 2
C L K I N _ S A T A _ N / C K S S C D _ N A H 12
C L K _ S A T A 2
C L K I N _ S A T A _ P / C K S S C D _ P
P 4 1
C L K _ B U F _ R E F 1 4 2
R E F C L K 1 4 I N
R 5 3 7
J 42 1 M_ 0 4
C L K _ P C I _ F B 2 4
C L K I N _ P C I LO O P B A C K
A H 51 X TA L 25 _ I N
X T A L 2 5 _ I N
X TA L 25 _ O U T
A H 53
X TA L 25 _ O U T
A F 3 8 X C L K _ R C O M P R 2 9 4 9 0 . 9 _1 % _ 0 4 90.9 -O ? % pullup
X C LK _ R C OM P 1 . 1 V S _ V T T
to + VccIO
(1.0 5V, S0 rail)
T 45
C L K O U T F L E X 0 / G P I O 64
P 4 3
C L K O U T F L E X 1 / G P I O 65
T 42
C L K O U T F L E X 2 / G P I O 66
N 5 0
C L K O U T F L E X 3 / G P I O 67
3 . 3 V S 2 , 1 0 , 1 1, 12 , 1 3 , 1 4 , 2 0 , 2 2 , 2 3, 24 , 2 5 , 2 6 , 2 7 , 2 9 , 3 0, 31 , 3 2 , 3 3 , 3 5 , 3 6 , 3 7, 42 , 4 3 , 4 4 , 4 6
1 . 1 V S _ V T T 2 , 4 , 6 , 7 , 1 9 , 2 0 , 2 2 , 2 5 , 26 , 2 7 , 4 1 , 4 3
3 . 3 V 3 , 4 , 1 2 , 1 3, 20 , 2 2 , 2 4 , 2 5 , 2 7 , 2 9, 30 , 3 1 , 3 2 , 3 3 , 3 4 , 3 7, 39 , 4 0 , 4 1
3 . 3 V
P C H _ B T _ E N # R 4 7 9 1 0K _ 04
S MB _ C L K R 4 6 1 2 . 2 K _ 0 4
S MB _ D A T A
R 4 7 1 2 . 2 K _ 0 4
P C H _ U P E K _ I N I T # R 4 9 9 1 0K _ 04
S ML 0 _ C L K R 2 5 1 2 . 2 K _ 0 4
S ML 0 _ D A TA R 2 5 9 2 . 2 K _ 0 4
L P D _ S P I _I N T R #
R 2 6 8 1 0K _ 04
S ML 1 _ C L K R 4 8 6 2 . 2 K _ 0 4
S ML 1 _ D A TA R 4 9 6 2 . 2 K _ 0 4
P E G_ C L K R E Q# R 4 7 0 1 0K _ 04
L A N _ C LK R E Q #
R 1 8 6 1 0K _ 04
C 6 5 8 2 2 P _ 50 V _N P O _ 0 4
X 7
X T A L _ 25 M H z
C 6 5 7 2 2 P _ 50 V _N P O _ 0 4