Toshiba Tecra M5 Maintenance Manual page 77

2.4 System Board Troubleshooting
Table 2-5 Printer port LED boot mode status (3/9)
LED Status
00h Prohibition of cache
Permission of L1/L2 cache in
FlashROM area
Initialization of H/W (before
DRAM recognition)
Initialization of PIT channel 1
01h Check of DRAM type and size
(at cold boot)
SM-RAM stack area test
02h Cache configuration
Cache permission
CMOS access test
(at cold boot)
Battery level check of CMOS
CMOS checksum check
Initialization of CMOS data (1)
Setting of IRT status
Storing DRAM size in CMOS
03h Resume branch (at cold boot)
TECRA M5 Maintenance Manual (960-542)
Test item
Initialization of MCH
Initialization of ICH.D30.Func0
Initialization of ICH.D31.Func0
Initialization of ICH.D31.Func1/2
Initialization of USB Controller
Initialization of ICH.D31.Func3
Initialization of ICH Audio
Initialization of TI Controller
(Setting the refresh interval to "30μs")
When unsupported memory is connected, becoming
HLT after beep sound
HLT when DRAM size is 0
HLT When it can not be used as a stack
(HLT when an error is detected)
(Setting of boot status and IRT busy flag, The rest bits
are 0)
[CONFIDENTIAL]
2 Troubleshooting Procedures
Message
Not resume when a CMOS error occurred
Not resume when resume status code is not set
Resume error check
S3 returning error (1CH) (Resume error LED=7AH)
SM-RAM checksum check (Resume error
LED=73H)
Check of memory configuration change (Resume
error LED=73H)
RAM area checksum check in system BIOS
(Resume error LED=79H)
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