Epson 6200A Core Cpu Manual page 84

Core cpu cmos 4-bit single chip microcomputer
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3 INSTRUCTION SET
SCPX MX,r
Source Format:
Operation:
OP-Code:
Type:
Clock Cycles:
Flag:
Description:
Example:
SCPY MY,r
Source Format:
Operation:
OP-Code:
Type:
Clock Cycles:
Flag:
Description:
Example:
78
Subtract with carry r-register from M(X) and increment X by 1
SCPX MX,r
M(X)
M(X) - r - C, X
1 1 1 1 0 0 1 1
MSB
V
7
C –
Set if a borrow is generated; otherwise, reset.
Z –
Set if the result is zero; otherwise, reset.
D –
Not affected
I –
Not affected
Subtracts the carry flag and the contents of the r-register from the data memory
location addressed by IX. X is incremented by 1. Incrementing X does not affect
the flags.
SCPX MX,B
X register
0101 0000
Memory (50H)
0110
B register
0010
C flag
0
Z flag
0
Subtract with carry r-register from M(Y) and increment Y by 1
SCPY MY,r
M(Y)
M(Y) - r - C, Y
1 1 1 1 0 0 1 1
MSB
V
7
C –
Set if a borrow is generated; otherwise, reset.
Z –
Set if the result is zero; otherwise, reset.
D –
Not affected
I –
Not affected
Subtracts the carry flag and the contents of the r-register from the data memory
location addressed by IY. Y is incremented by 1. Incrementing Y does not affect
the flags.
SCPY MY,A
Y register
1111 1111
Memory (FFH)
0111
A register
0010
C flag
1
Z flag
1
X + 1
1 0 r
r
F38H to F3BH
1
0
LSB
0101 0001
0100
0010
0
0
Y + 1
1 1 r
r
F3CH to F3FH
1
0
LSB
0000 0000
0100
0010
0
0
EPSON
S1C6200/6200A CORE CPU MANUAL

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