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3 INSTRUCTION SET
LD Mn,A
Source Format:
Operation:
OP-Code:
Type:
Clock Cycles:
Flag:
Description:
Example:
LD Mn,B
Source Format:
Operation:
OP-Code:
Type:
Clock Cycles:
Flag:
Description:
Example:
48
Load A-register into memory
LD Mn,A
M(n
to n
)
A
3
0
1 1 1 1 1 0 0 0 n
MSB
IV
5
C –
Not affected
Z –
Not affected
D –
Not affected
I –
Not affected
Loads the contents of the A-register into the location addressed by Mn.
LD M0AH,A
A register
0110
Memory (0AH)
0100
Memory (0BH)
1011
Load B-register into memory
LD Mn,B
M(n
to n
)
B
3
0
1 1 1 1 1 0 0 1 n
MSB
IV
5
C –
Not affected
Z –
Not affected
D –
Not affected
I –
Not affected
Loads the contents of the B-register into the data memory location addressed by
Mn.
LD M0,B
B register
0100
Memory (00H)
1011
Memory (01H)
1111
n
n
n
F80H to F8FH
3
2
1
0
LSB
LD M0BH,A
0110
0110
0110
0110
1011
0110
n
n
n
F90H to F9FH
3
2
1
0
LSB
LD M1,B
0100
0100
0100
0100
1111
0100
EPSON
S1C6200/6200A CORE CPU MANUAL
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